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4 changes: 4 additions & 0 deletions arch/arm/dts/Makefile
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@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0+

dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb
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dtb-$(CONFIG_ARCH_ZYNQ) += \
bitmain-antminer-s9.dtb \
zynq-adrv9361.dtb \
zynq-adrv9364.dtb \
zynq-cc108.dtb \
zynq-coraz7s.dtb \
zynq-cse-nand.dtb \
zynq-cse-nor.dtb \
zynq-cse-qspi-single.dtb \
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zynqmp-zc1751-xm016-dc2.dtb \
zynqmp-zc1751-xm017-dc3.dtb \
zynqmp-zc1751-xm018-dc4.dtb \
zynqmp-adrv9009-zu11eg-adrv2crr-fmc.dtb \
zynqmp-zc1751-xm019-dc5.dtb

zynqmp-p-a2197-00-revA-x-prc-01-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-01-revA.dtbo
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99 changes: 99 additions & 0 deletions arch/arm/dts/zynq-adrv9361.dts
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// SPDX-License-Identifier: GPL-2.0+
/*
* Analog Devices Inc. ADRV9361-Z7035 board DTS
*
* Copyright (C) 2015-2018 Analog Devices Inc.
*/

/dts-v1/;
#include "zynq-7000.dtsi"

/ {
model = "Analog Devices ADRV9361-Z7035 (Z7035/AD9361)";
compatible = "adi,adrv9361", "xlnx,zynq-7000";

aliases {
ethernet0 = &gem0;
serial0 = &uart1;
spi0 = &qspi;
};

memory {
device_type = "memory";
reg = <0x0 0x40000000>;
};

chosen {
bootargs = "earlyprintk";
linux,stdout-path = &uart1;
stdout-path = &uart1;
};

usb_phy0: phy0 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
};

&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;

ethernet_phy: ethernet-phy@7 {
reg = <7>;
};
};

&qspi {
status = "okay";
is-dual = <0>;
num-cs = <1>;
flash@0 {
compatible = "n25q256a11,";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0xE0000>; /* 896k */
};
partition@qspi-uboot-env {
label = "qspi-uboot-env";
reg = <0xE0000 0x20000>; /* 128k */
};
partition@qspi-linux {
label = "qspi-linux";
reg = <0x100000 0x500000>; /* 5M */
};
partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x600000 0x20000>; /* 128k */
};
partition@qspi-rootfs {
label = "qspi-rootfs";
reg = <0x620000 0xCE0000>; /* 12875k */
};
partition@qspi-bitstream {
label = "qspi-bitstream";
reg = <0x1300000 0xD00000>; /* 13 M */
};
};
};

&sdhci0 {
status = "okay";
};

&uart1 {
status = "okay";
};

&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
};
98 changes: 98 additions & 0 deletions arch/arm/dts/zynq-adrv9364.dts
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// SPDX-License-Identifier: GPL-2.0+
/*
* Analog Devices Inc. ADRV9364-Z7020 board DTS
*
* Copyright (C) 2015-2018 Analog Devices Inc.
*/
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
model = "Analog Devices ADRV9364-Z7020 (Z7020/AD9364)";
compatible = "adi,adrv9361", "xlnx,zynq-7000";

aliases {
ethernet0 = &gem0;
serial0 = &uart1;
spi0 = &qspi;
};

memory {
device_type = "memory";
reg = <0x0 0x40000000>;
};

chosen {
bootargs = "earlyprintk";
linux,stdout-path = &uart1;
stdout-path = &uart1;
};

usb_phy0: phy0 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
};

&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;

ethernet_phy: ethernet-phy@7 {
reg = <7>;
};
};

&qspi {
status = "okay";
is-dual = <0>;
num-cs = <1>;
flash@0 {
compatible = "n25q256a11,";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0xE0000>; /* 896k */
};
partition@qspi-uboot-env {
label = "qspi-uboot-env";
reg = <0xE0000 0x20000>; /* 128k */
};
partition@qspi-linux {
label = "qspi-linux";
reg = <0x100000 0x500000>; /* 5M */
};
partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x600000 0x20000>; /* 128k */
};
partition@qspi-rootfs {
label = "qspi-rootfs";
reg = <0x620000 0xCE0000>; /* 12875k */
};
partition@qspi-bitstream {
label = "qspi-bitstream";
reg = <0x1300000 0xD00000>; /* 13 M */
};
};
};

&sdhci0 {
status = "okay";
};

&uart1 {
status = "okay";
};

&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
};
76 changes: 76 additions & 0 deletions arch/arm/dts/zynq-coraz7s.dts
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// SPDX-License-Identifier: GPL-2.0+
/*
* Digilent Cora Z7 board DTS
*
* Copyright (C) 2016 Digilent
*/
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
model = "Zynq Cora Z7 Development Board";
compatible = "digilent,zynq-coraz7", "xlnx,zynq-7000";

aliases {
ethernet0 = &gem0;
serial0 = &uart0;
mmc0 = &sdhci0;
};

cpus {
/delete-node/ cpu1;
};

memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
};

cpus {
/delete-node/ cpu1;
};

chosen {
bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait";
stdout-path = "serial0:115200n8";
};

usb_phy0: phy0@e0002000 {
compatible = "ulpi-phy";
#phy-cells = <0>;
reg = <0xe0002000 0x1000>;
view-port = <0x0170>;
drv-vbus;
};
};

&clkc {
ps-clk-frequency = <50000000>;
};

&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;

ethernet_phy: ethernet-phy@0 { /* rtl8211e-vl */
reg = <1>;
device_type = "ethernet-phy";
};
};

&sdhci0 {
u-boot,dm-pre-reloc;
status = "okay";
};

&uart0 {
u-boot,dm-pre-reloc;
status = "okay";
};

&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
};
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