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Signed-off-by: Philip Molloy <philip.molloy@analog.com> Series-to: u-boot Series-cc: linux@analog.com Cover-letter: Minor IMX DDR init clean-up This series makes minor clean-up changes to the IMX DDR init code. To support an upcoming ADI SoC that also uses LPDDR4 and Synpsys IP I would like to leverage the i.MX implementation. Therefore this clean-up can also serve as a kind of RFC. I would love to know if the maintainers are open to transitioning to a more generic implementation. Some additional context and a comparison of DDR init implementations: https://philipmolloy.com/ddr-init.html I was also curious about the need for the reg32_write and reg32_read functions, where reg32_write just flips the arguments. I reviewed the NXP i.MX downstream repo on Github.[1] The only major difference for the PHY driver appears to be "Quickboot" support, which appears to be specific to the i.MX 95. [1]: https://github.com/nxp-imx/uboot-imx END
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
IP2APB_DDRPHY_IPS_BASE_ADDR() is always passed 0, which is then multiplied by 0x2000000. Since that results in 0 remove 0x2000000 and the argument entirely. Instead use DDR_PHY_BASE, which was already defined in imx9. Add the definition to imx8m. Signed-off-by: Philip Molloy <philip.molloy@analog.com>
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Mar 3, 2026
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