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Merged
alaindargelas merged 1 commit into from
Mar 7, 2026
Merged

Formatting #4078

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12 changes: 8 additions & 4 deletions src/DesignCompile/CompileExpression.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1750,8 +1750,10 @@ UHDM::any *CompileHelper::compileExpression(
uint32_t vopType = UhdmWriter::getVpiOpType(childType);
// This is the PREFIX (pre-increment/pre-decrement) case:
// operator comes before operand. Map to vpiPreIncOp/vpiPreDecOp.
if (vopType == vpiPostIncOp) vopType = vpiPreIncOp;
else if (vopType == vpiPostDecOp) vopType = vpiPreDecOp;
if (vopType == vpiPostIncOp)
vopType = vpiPreIncOp;
else if (vopType == vpiPostDecOp)
vopType = vpiPreDecOp;
if (vopType) {
UHDM::operation *op = s.MakeOperation();
op->VpiOpType(vopType);
Expand Down Expand Up @@ -3249,8 +3251,10 @@ UHDM::any *CompileHelper::compileExpression(
uint32_t vopType = UhdmWriter::getVpiOpType(type);
// This is the PREFIX (pre-increment/pre-decrement) case:
// operator comes before operand. Map to vpiPreIncOp/vpiPreDecOp.
if (vopType == vpiPostIncOp) vopType = vpiPreIncOp;
else if (vopType == vpiPostDecOp) vopType = vpiPreDecOp;
if (vopType == vpiPostIncOp)
vopType = vpiPreIncOp;
else if (vopType == vpiPostDecOp)
vopType = vpiPreDecOp;
if (vopType) {
UHDM::operation *op = s.MakeOperation();
if (attributes != nullptr) {
Expand Down
8 changes: 5 additions & 3 deletions src/DesignCompile/DesignElaboration.cpp
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Expand Up @@ -1157,11 +1157,13 @@ void DesignElaboration::elaborateInstance_(
allSubInstances);
parent->addSubInstance(child);

// First try the simple expression evaluator (handles i = i + 1, etc.)
// First try the simple expression evaluator (handles i = i + 1,
// etc.)
Value* newVal = m_exprBuilder.evalExpr(fC, expr, parent);
if (!newVal->isValid()) {
// Fallback: use full expression compilation for complex increments
// like step = step * CHUNK (where CHUNK is a parameter)
// Fallback: use full expression compilation for complex
// increments like step = step * CHUNK (where CHUNK is a
// parameter)
m_helper.checkForLoops(true);
int64_t newValInt = m_helper.getValue(
validValue, parentDef, fC, expr, m_compileDesign, Reduce::Yes,
Expand Down
46 changes: 34 additions & 12 deletions src/DesignCompile/NetlistElaboration.cpp
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Expand Up @@ -1999,7 +1999,9 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
for (auto a : *sig->attributes()) a->VpiParent(logicn);
}
logicn->VpiSigned(sig->isSigned());
logicn->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
logicn->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
// Move range to typespec for simple types
// logicn->Ranges(packedDimensions);
ref_typespec* rt = s.MakeRef_typespec();
Expand Down Expand Up @@ -2115,9 +2117,13 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
stv->VpiParent(pnets);
for (auto r : *packedDimensions) r->VpiParent(pnets);
obj = pnets;
pnets->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
pnets->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
} else {
stv->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
stv->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
}
} else if (const Struct* st = datatype_cast<const Struct*>(dtype)) {
struct_net* stv = s.MakeStruct_net();
Expand All @@ -2139,9 +2145,13 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
stv->VpiParent(pnets);
for (auto r : *packedDimensions) r->VpiParent(pnets);
obj = pnets;
pnets->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
pnets->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
} else {
stv->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
stv->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
}
} else if (dtype->getCategory() == DataType::Category::PARAMETER ||
dtype->getCategory() == DataType::Category::SIMPLE_TYPEDEF) {
Expand All @@ -2163,7 +2173,9 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
for (auto a : *sig->attributes()) a->VpiParent(logicn);
}
logicn->VpiSigned(sig->isSigned());
logicn->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
logicn->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
// Move range to typespec for simple types
// logicn->Ranges(packedDimensions);
ref_typespec* rt = s.MakeRef_typespec();
Expand Down Expand Up @@ -2194,9 +2206,13 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
stv->VpiParent(pnets);
for (auto r : *packedDimensions) r->VpiParent(pnets);
obj = pnets;
pnets->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
pnets->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
} else {
stv->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
stv->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
}
} else if (spec->UhdmType() == uhdmenum_typespec) {
enum_net* stv = s.MakeEnum_net();
Expand All @@ -2219,9 +2235,13 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
stv->VpiParent(pnets);
for (auto r : *packedDimensions) r->VpiParent(pnets);
obj = pnets;
pnets->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
pnets->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
} else {
stv->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
stv->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword
: sig->getType()));
}
} else if (spec->UhdmType() == uhdmbit_typespec) {
bit_var* logicn = s.MakeBit_var();
Expand Down Expand Up @@ -2274,7 +2294,8 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
for (auto a : *sig->attributes()) a->VpiParent(logicn);
}
logicn->VpiSigned(sig->isSigned());
logicn->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
logicn->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
ref_typespec* rt = s.MakeRef_typespec();
rt->VpiParent(logicn);
rt->Actual_typespec(tps);
Expand Down Expand Up @@ -2379,7 +2400,8 @@ bool NetlistElaboration::elabSignal(Signal* sig, ModuleInstance* instance,
} else {
logic_net* logicn = s.MakeLogic_net();
logicn->VpiSigned(sig->isSigned());
logicn->VpiNetType(UhdmWriter::getVpiNetType(netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
logicn->VpiNetType(UhdmWriter::getVpiNetType(
netKeyword != VObjectType::slNoType ? netKeyword : sig->getType()));
if (sig->attributes()) {
logicn->Attributes(sig->attributes());
for (auto a : *sig->attributes()) a->VpiParent(logicn);
Expand Down
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