[RFC] MCU ROM Patching via PMP trap-and-patch#1163
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This RFC proposes an authenticated software ROM patching mechanism for MCU ROM using existing VeeR EL2 PMP support. Patch records are stored in OTP, verified with Ed25519, copied into SRAM, synchronized with fence.i, and dispatched through PMP instruction access faults on 4-byte NA4 no-execute ROM entries. The RFC covers boot-time setup, trap dispatch, patch ABI restrictions, OTP record format, supersession, CRITICAL behavior, Ed25519 verification, SRAM reservations, DICE measurement impact, and threat model. Related: chipsalliance/caliptra-sw#3399 Signed-off-by: Robert Schilling <rschilling@meta.com>
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This RFC proposes an authenticated software ROM patching mechanism for MCU ROM using existing VeeR EL2 PMP support. Patch records are stored in OTP, verified with Ed25519, copied into SRAM, synchronized with fence.i, and dispatched through PMP instruction access faults on 4-byte NA4 no-execute ROM entries.
The RFC covers boot-time setup, trap dispatch, patch ABI restrictions, OTP record format, supersession, CRITICAL behavior, Ed25519 verification, SRAM reservations, DICE measurement impact, and threat model.
The RFC is included in the PR to better allow commenting on specific parts. A rendered version of the RFC can be found in https://github.com/Razer6/caliptra-ss/blob/rfc-rom-patching/rfc/rfc-0001-mcu-rom-patching.md
/cc @davidschrammel @sameo @rsahita
Related: chipsalliance/caliptra-sw#3399