Formatter fails to converge when `define is used.

[tornose]

Test case
Running verible-verilog-format on a single file with just a `define TEST statement with default options results in errors in convergence.

  `define TEST

Command run: verible-verilog-format test.sv

Include any possible diagnostic messages from the formatter.

`define TEST
.\test.sv: Re-formatted text does not match formatted text; formatting failed to converge!  Please file a bug.
========== Original: --lines: ==========
`define TEST
============== Formatted: ==============
`define TEST
============= Re-formatted: ============
`define TEST
============== Diffs are: ==============
-`define TEST
+`define TEST
; problematic formatter output is
`define TEST
<<EOF>>

Expected or suggested output

  `define TEST

[tornose]

Might be related to #2441. Running through verible-verilog-ls (via VSCode extension) does not directly result in errors but does produce additional lines as seen in that issue.