cpu/cv32e41p: Keep standard variant on RV32IM

Issue #1364 reports litex_sim hanging with CV32E41P firmware built for RV32IMC. The analyzed failure is not in the LiteX wrapper: the archived CV32E41P RTL computes is_compressed_o in cv32e41p_merged_decoder.sv, but does not declare it as a decoder output port or connect it in cv32e41p_id_stage.sv.

With permissive SystemVerilog handling, id_stage_i.is_compressed becomes an implicit undriven net. The ID-stage IMMB_PCINCR path can then use pc+4 instead of pc+2 for compressed instructions; c.jal writes the wrong return address, skips the caller return-address restore, and loops.

A minimal CPU RTL fix was validated separately by declaring the decoder output, declaring logic is_compressed in the ID stage, and wiring .is_compressed_o(is_compressed). Since the CV32E41P repository is archived and the pythondata package tracks that RTL, keep LiteX on the known-good standard RV32IM variant and do not advertise an imc variant.

Tests: python3 -m pytest -q test/test_cpu.py

Author: enjoy-digital

litex/soc/cores/cpu/cv32e41p/core.py

@@ -31,7 +31,9 @@
     #                       |    |||/--- Single-Precision Floating-Point
     #                       |    ||||/-- Double-Precision Floating-Point
     #                       i    macfd
-    "standard": "-march=rv32i2p0_mc    -mabi=ilp32 ",
+    # Keep software builds on RV32IM: the archived CV32E41P RTL has a broken
+    # compressed-instruction flag path, which can corrupt c.jal link addresses.
+    "standard": "-march=rv32i2p0_m     -mabi=ilp32 ",
 }
 
 # OBI / APB / Trace Layouts ------------------------------------------------------------------------

test/test_cpu.py

@@ -0,0 +1,31 @@
+#
+# This file is part of LiteX.
+#
+# Copyright (c) 2026 Florent Kermarrec <florent@enjoy-digital.fr>
+# SPDX-License-Identifier: BSD-2-Clause
+
+import unittest
+
+from litex.soc.cores.cpu.cv32e41p.core import CPU_VARIANTS, CV32E41P
+
+
+def _cv32e41p_gcc_flags(variant):
+    cpu = CV32E41P.__new__(CV32E41P)
+    cpu.variant = variant
+    return cpu.gcc_flags
+
+
+class TestCV32E41P(unittest.TestCase):
+    def test_only_standard_variant_is_advertised(self):
+        self.assertEqual(CPU_VARIANTS, ["standard"])
+
+    def test_standard_variant_does_not_emit_compressed_instructions(self):
+        flags = _cv32e41p_gcc_flags("standard")
+
+        self.assertIn("-march=rv32i2p0_m", flags)
+        self.assertNotIn("-march=rv32i2p0_mc", flags)
+        self.assertIn("-D__cv32e41p__", flags)
+
+
+if __name__ == "__main__":
+    unittest.main()

test/test_integration.py

@@ -262,7 +262,7 @@ def test_linux_on_litex_rocket_nexys_video_generation(tmp_path):
     "blackparrot",  # (riscv   / softcore) -> Broken install?
     "cortex_m1",    # (arm     / softcore) -> Proprietary code.
     "cortex_m3",    # (arm     / softcore) -> Proprieraty code.
-    "cv32e41p",     # (riscv   / softcore) -> Broken?
+    "cv32e41p",     # (riscv   / softcore) -> Needs to be tested.
     "cva5",         # (riscv   / softcore) -> Needs to be tested.
     "cva6",         # (riscv   / softcore) -> Needs to be tested.
     "eos_s3",       # (arm     / hardcore) -> Hardcore.