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soc not booting when spi_flash is used

Status: Open.

#2351 In enjoy-digital/litex;

· mjijeesh opened on Oct 16, 2025

Wrong ROM size for 64-bit CPUs

Status: Open.

#2337 In enjoy-digital/litex;

· franos-cm opened on Sep 27, 2025

MultiReg false path issue?

Status: Open.

#2329 In enjoy-digital/litex;

· diorcety opened on Sep 17, 2025

Is lack of UartBone support causing OpenOCD to report "dtmcontrol is 0"

Status: Open.

#2323 In enjoy-digital/litex;

· snoop911 opened on Sep 1, 2025

neorv32 fails to build (multiple assignments for "addr_mask_napot" , "addr_mask" )

Status: Open.

#2321 In enjoy-digital/litex;

· Ruinland opened on Sep 1, 2025

litex_server --jtag fails to connect with openocd 0.12.0

Status: Open.

#2307 In enjoy-digital/litex;

· polprog opened on Aug 11, 2025

Can't load Linux on Microwatt and Litex Bios

Status: Open.

#2306 In enjoy-digital/litex;

· MojoJojo opened on Aug 10, 2025

The L2 cache of the VexiiRiscv CPU causes the BIOS to hang during startup on the ECP5 FPGA.

Status: Open.

#2304 In enjoy-digital/litex;

· leeguang517 opened on Aug 9, 2025

add_video_framebuffer not configured to work with HyperRAM.

Status: Open.

#2303 In enjoy-digital/litex;

· fIREmiNeR1 opened on Aug 4, 2025

AXI4 Full User Port Burst Mode Fails on LiteDRAM AXI2Native Bridge

Status: Open.

#2301 In enjoy-digital/litex;

· gvillanovanm opened on Aug 1, 2025

"main_ram Region in IO region, it can't be cached" error attempting to use <code>rocket</code> cpu for <code>sipeed_tang_nano_20k</code>

Status: Open.

#2284 In enjoy-digital/litex;

· ids1024 opened on Jul 14, 2025

How to pass defines to verilator/yosys

Status: Open.

#2283 In enjoy-digital/litex;

· keesj opened on Jul 11, 2025