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PR Digest 2026 02 28
Tiotto, Ettore edited this page Mar 9, 2026
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post # PR Summary
Period: 2026-02-01 to 2026-02-28 | Total PRs: 218 (148 from Xe2/Xe3/Xe3P, 70 from Xe4) | Lines changed: +114,259 / -38,761
February was dominated by a major expansion of native tensor descriptor support throughout the compilation pipeline — from TTIR passes to final lowering — alongside a systematic refactor of axis analysis that improves the accuracy of 2D block I/O decisions. New hardware support landed for an additional GPU family, and the driver gained automatic large-register-file retry to recover from compilation failures. Twenty-eight upstream synchronizations were completed with a pass rate ranging from 97.52% to 97.75%.
Key accomplishments:
- Built a complete native tensor descriptor pipeline from TTIR transforms through LLVM lowering, enabling more efficient memory access without pointer arithmetic
- Refactored the axis information analysis in four incremental steps to correctly handle tensor descriptors, transposes, and unrealized casts, improving the accuracy of 2D block I/O selection
- Added automatic kernel recompilation with large register file mode when the initial build fails, preventing silent compilation errors in production
- Expanded device support to an additional GPU family and updated device property tables covering the full current hardware lineup
- Removed the Intel-specific reduction lowering fork in favor of the upstream implementation, reducing maintenance burden
A full native tensor descriptor pipeline was constructed across six compiler passes, and 2D block I/O correctness was improved with several targeted fixes.
- #6118 Add DescriptorLoadOp and DescriptorStoreOp lowering in LoadStoreOpToLLVM pass — Implements the final lowering step for descriptor load/store ops into 2D block-load/store sequences with DPAS-friendly packing. (+889/-30, @anthonycanino)
- #6204 TensorDescToBlockPointer: Find encoding from users — Propagates tensor encodings from the users of MakeTensorDescOp rather than always defaulting to blocked encoding, enabling custom layout dispatch. (+150/-33, @whitneywhtsang)
- #5759 Support rank > 2 tensor load with block io — Extends 2D block I/O lowering to handle rank-3 tensors, covering batch dimensions in matrix operations. (+349/-60, @chengjunlu)
- #6095 Propagate cache modifiers on predicated load/store — Ensures cache control hints (L1/L3 read policies) are preserved through predicated load/store lowering. (+153/-40, @uditagarwal97)
- #6192 TensorDescToBlockPointer: Support tensor type with default BlockedEncoding — Handles DefaultBlockedEncoding tensors produced by ConvertTritonToTritonGPU so the pass runs correctly after GPU annotation. (+168/-112, @whitneywhtsang)
- #6143 Coalesce pass support for tensor descriptors — Extends the Coalesce pass to assign coalesced layouts to tensor descriptor operations. (+86/-5, @mieshkiwrk)
- #6127 Create Intel-specific RewriteTensorDescriptorToPointer pass — Introduces a dedicated TTIR-level pass converting tensor descriptors to block pointers with Intel-specific handling. (+780/-3, @whitneywhtsang)
- #6103 RewriteTensorDescriptorToPointer: Increase legal op set — Broadens the set of operations the pass considers legal, enabling more tensor descriptor patterns to lower correctly. (+226/-163, @whitneywhtsang)
- #6029 Run TTIR pipeline using tensor descriptors — Threads native tensor descriptor ops through the full TTIR optimization pipeline instead of eagerly converting to pointers. (+57/-11, @etiotto)
- #6006 Enhance stride versioning pass to support tensor descriptors — Updates the stride versioning transform to correctly handle tensor descriptor access patterns. (+321/-134, @etiotto)
- #6024 Enhance FuseReshape to support tensor descriptors — Extends the FuseReshape pass to fuse reshape operations through tensor descriptor ops. (+246/-35, @etiotto)
- #6031 Reduce GenISA usage in 2DBlockIO — Replaces GenISA intrinsic paths in 2D block I/O with SPIR-V builtins where possible, improving portability. (+227/-412, @whitneywhtsang)
- #5927 Allow blocked load to populate out-of-bounds data with NaN — Permits loads that read beyond the tensor boundary to return NaN instead of triggering errors, matching hardware behavior. (+266/-4, @anthonycanino)
- #6034 Fix transpose load tile shape exceeding hardware capability — Clamps transposed 2D block load tile dimensions to hardware limits before lowering. (+79/-11, @chengjunlu)
- #6018 Check mask constancy when generating block IO — Adds a mask-constancy check before selecting block I/O lowering to prevent incorrect code generation with non-constant masks. (+57/-1, @chengjunlu)
- #6202 Fix assertion — Fix assertion. (+17/-11, @whitneywhtsang)
- #6164 Add assertions — Add assertions. (+35/-82, @whitneywhtsang)
-
#6159 Move
TritonIntelTensorDescToBlockPointerafterTritonAnnotateModule— MoveTritonIntelTensorDescToBlockPointerafterTritonAnnotateModule. (+1/-1, @whitneywhtsang) - #6033 Restrict tensor descriptor last dim to be 1 — Restrict tensor descriptor last dim to be 1. (+1/-2, @whitneywhtsang)
- #6046 Fix a compilation error when storeOp and loadOp are linked by advanceOp — Fix a compilation error when storeOp and loadOp are linked by advanceOp. (+25/-0, @anmyachev)
- #6048 Restrict tensor descriptor last dim to be 1 — Restrict tensor descriptor last dim to be 1. (+4/-4, @whitneywhtsang)
- #6043 Restrict tensor descriptor last dim to be 1 — Restrict tensor descriptor last dim to be 1. (+9/-9, @whitneywhtsang)
- #6042 Restrict tensor descriptor last dim to be 1 — Restrict tensor descriptor last dim to be 1. (+56/-20, @whitneywhtsang)
- #6044 Revert "[LoadStoreOpToLLVM] Enable block io for all layout by default. (#5641) — Revert "[LoadStoreOpToLLVM] Enable block io for all layout by default. (#5641). (+13/-10, @whitneywhtsang)
- #6045 Restrict tensor descriptor last dim to be 1 — Restrict tensor descriptor last dim to be 1. (+9/-9, @whitneywhtsang)
- #5641 Enable block io for all layout by default. — Enable block io for all layout by default.. (+14/-18, @chengjunlu)
A four-part refactor of the AxisInfo analysis and several layout correctness fixes resolved long-standing inaccuracies in stride and layout propagation.
- #6104 AxisInfo: Add support for MakeTensorDescriptor and DescriptorLoad operations — Extends Intel AxisInfo to track contiguity and divisibility through tensor descriptor creation and load ops. (+163/-31, @etiotto)
- #6088 AxisInfo: Add support for tt.trans and unrealized_conversion_cast — Adds AxisInfo handling for transposition and cast ops so stride analysis can propagate through them. (+85/-0, @etiotto)
- #6082 Update AxisInfo analysis — part 2 — Second stage of the axis analysis refactor, restructuring divisibility and contiguity inference. (+72/-51, @etiotto)
- #6079 Update AxisInfo analysis — part 1 — First stage: cleans up and unifies AxisInfo base class methods to prepare for later extensions. (+33/-34, @etiotto)
- [#5948 Enhance RemoveLayoutConversions for issue #5763](https://github.com/intel/intel-xpu-backend-for-triton/pull/5948) — Enhances backward rematerialization to eliminate duplicate values during slice computation. (+361/-56, @chengjunlu)
- #6062 RemoveLayoutConversions: Fix updateAdvanceOpChain recursion — Fixes an infinite recursion in the advance-op chain update logic in the layout removal pass. (+46/-16, @whitneywhtsang)
- #6058 Create SimplifySignedArithmetic pass — Introduces a new TTIR pass that simplifies signed arithmetic expressions to enable downstream optimizations. (+665/-0, @admitric)
- #6185 Use common ReduceOpToLLVM.cpp for Intel GPU backend — Removes the Intel-specific reduction lowering fork, delegating to the upstream implementation which now supports the required warp configuration. (+175/-577, @chengjunlu)
- #6114 Optimize Fp8E5M2-to-Fp16 conversion: simplify to zext+shl sequence — Replaces a multi-step float8-to-float16 conversion with a simpler bit-shift sequence. (+12/-22, @wdziurdz)
- #6183 Create findOrCreateCastOp utility — Adds a shared helper to reuse existing casts rather than inserting duplicates, reducing IR size near conversion sites. (+53/-54, @whitneywhtsang)
- #5883 Add basic ManageableBarriers usage — Introduces manageable (software-controlled) barriers as a foundation for producer/consumer synchronization patterns. (+113/-101, @whitneywhtsang)
-
#6090 Remove unused operations
glueandextract— Removes two dead TritonIntelGPU dialect operations no longer needed after upstream changes. (+12/-392, @etiotto) - #6153 Remove structured binding usage in DPASAnalysis — Replaces a C++20-specific structured binding captured in a lambda with C++17-compatible code, fixing compilation under oneAPI 2025.2.0. (+1/-1, @lowpolyneko)
- #6041 Use RankedTensorType's cloneWithEncoding — Uses RankedTensorType's cloneWithEncoding. (+11/-20, @etiotto)
-
#6017 Remove
TRITON_INTEL_2DBLOCK_ENABLE_NO_BOUNDARY_CHECK— RemovesTRITON_INTEL_2DBLOCK_ENABLE_NO_BOUNDARY_CHECK. (+15/-24, @whitneywhtsang)
Driver and runtime updates expand hardware coverage and improve resilience against compilation failures.
- #6177 Update device properties in driver.py and compiler.py — Updates device capability tables and tuning parameters for the full current hardware lineup, closing #5743. (+403/-121, @anmyachev)
- #6123 Auto-retry kernel compilation with large GRF mode on build failure — Adds automatic recompilation in large-register-file mode when the initial IGC compilation fails, preventing silent errors in register-heavy kernels. (+130/-13, @Egor-Krivov)
- #6133 Add G31 support — Adds device identification and capability mapping for the G31 GPU family. (+19/-2, @mieshkiwrk)
- #6070 Reland round_f32_to_tf32 with AMD/NVIDIA-aligned argument order — Reapplies a reverted TF32 rounding fix with argument ordering aligned to the AMD and NVIDIA backend conventions. (+211/-17, @mieshkiwrk)
- #6092 PrefetchOp to use memory effects — Annotates the Intel PrefetchOp with MLIR memory effects so it participates correctly in DCE and effect-based analyses. (+53/-25, @etiotto)
-
#6195 Update
spirv-llvm-translator.conf— Updatespirv-llvm-translator.conf. (+1/-1, @whitneywhtsang) -
#6129 Update
spirv-llvm-translator.conf— Updatespirv-llvm-translator.conf. (+1/-1, @whitneywhtsang) - #6122 Fix extra space in test comment — Fix extra space in test comment. (+1/-1, @app/copilot-swe-agent)
- #6086 Correct code comment — Correct code comment. (+1/-1, @wdziurdz)
-
#6059 Simplify
spirv-llvm-translatorpatch — Simplifyspirv-llvm-translatorpatch. (+12/-18, @whitneywhtsang) - #6064 Add SPIRV extensions — Add SPIRV extensions. (+6/-1, @whitneywhtsang)
-
#6066 Update
spirv-llvm-translator.conf— Updatespirv-llvm-translator.conf. (+1/-1, @whitneywhtsang) -
#6061 Remove
SPV_INTEL_bfloat16_arithmeticpatch — RemoveSPV_INTEL_bfloat16_arithmeticpatch. (+0/-24, @whitneywhtsang) -
#6060 Add
SPV_INTEL_bfloat16_arithmeticextension — AddSPV_INTEL_bfloat16_arithmeticextension. (+2/-1, @whitneywhtsang)
New test infrastructure, expanded unit test coverage for DPAS analysis, and systematic CI improvements to reduce execution time.
-
#6139 triton_utils: Initial commit — Introduces a standalone
triton_utilsPython library for kernel benchmarking, profiling, and debug utilities. (+2,653/-0, @vlad-penkin) - #5997 Turn triton tutorials into pytest cases and integrate triton_utils — Converts the tutorial scripts into pytest-based tests and integrates the new triton_utils library throughout. (+254/-633, @januszjah)
- #6128 DPASAnalysis: Add gtest unit test cases — Adds comprehensive C++ unit tests for the DPAS analysis pass covering edge cases in workload classification. (+514/-3, @etiotto)
- #6106 Improve test coverage for DPASAnalysis — Broadens Python test coverage for the DPAS analysis module. (+307/-2, @etiotto)
- #6145 Differentiate defaultAllocationAnalysisScratchSizeFn — Separates scratch size estimation functions per backend to allow more accurate shared memory allocation predictions. (+55/-4, @whitneywhtsang)
-
#6152 Trigger benchmark workflows on run-benchmarks PR label — Allows contributors to trigger benchmark CI on any PR by applying the
run-benchmarkslabel, without requiring benchmark file changes. (+4/-0, @etiotto) - #6212 Fix Triton benchmarks label trigger — Fix Triton benchmarks label trigger. (+30/-8, @whitneywhtsang)
- #6178 Add Claude rules to the project — Add Claude rules to the project. (+2514/-0, @etiotto)
-
#6199 Update
intelskiplist — Updateintelskiplist. (+1/-1, @whitneywhtsang) - #5655 Disable ignore errors on windows — Disable ignore errors on windows. (+38/-5, @dev-tomek)
- #6190 Add Arc Pro B60 — Add Arc Pro B60. (+1/-0, @kwasd)
- #6109 Skip BMG regressions — Skip BMG regressions. (+8/-0, @kwasd)
-
#6182 Reduce
test_cast_matmultensor size — Reducetest_cast_matmultensor size. (+2/-2, @whitneywhtsang) - #6102 Allow vllm/sglang to run on specific pin — Allow vllm/sglang to run on specific pin. (+119/-23, @Egor-Krivov)
-
#6171 Enable
test_get_dataafter 6d3f3da for XPU — Enabletest_get_dataafter 6d3f3da for XPU. (+5/-3, @anmyachev) -
#6172 Enable back
test_api.py::test_state— Enable backtest_api.py::test_state. (+0/-2, @anmyachev) -
#6174 Update
build-test-python.yml- don't run on LTS driver by default — Updatebuild-test-python.yml- don't run on LTS driver by default. (+1/-1, @anmyachev) -
#6170 Use OneDNN instead of cuBLAS for XPU backend in
08-grouped-gemm.py— Use OneDNN instead of cuBLAS for XPU backend in08-grouped-gemm.py. (+3/-3, @anmyachev) - #6134 Tune flash attn bwd — Tune flash attn bwd. (+65/-11, @anmyachev)
- #6117 XPU BLAS TFLOPS support for roofline — XPU BLAS TFLOPS support for roofline. (+24/-7, @slawblauciak)
- #6148 Enhance copilot code review custom instructions — Enhance copilot code review custom instructions. (+80/-204, @etiotto)
-
#6147 Fixed lts and cri issue for new test
test_auto_grf_on_build_failure— Fixed lts and cri issue for new testtest_auto_grf_on_build_failure. (+7/-0, @Egor-Krivov) -
#6142 Reduce tensor size in
test_matmul.py— Reduce tensor size intest_matmul.py. (+4/-0, @whitneywhtsang) - #6135 Hotfix for #6130 - cleanup specific for B580 — Hotfix for #6130 - cleanup specific for B580. (+7/-0, @Egor-Krivov)
- #6126 Use pti from DLE 2025.3 — Use pti from DLE 2025.3. (+0/-32, @anmyachev)
- #6105 : Improve DPASAnaysis — : Improve DPASAnaysis. (+26/-17, @etiotto)
- #6100 Fixed BMG runs of vllm benchmarks — Fixed BMG runs of vllm benchmarks. (+16/-3, @Egor-Krivov)
- #6097 CUTLASS -> SYCL-TLA renaming + bump version 0.5 -> 0.7 — CUTLASS -> SYCL-TLA renaming + bump version 0.5 -> 0.7. (+97/-96, @mieshkiwrk)
- #6108 Update PyTorch pin — Update PyTorch pin. (+1/-391, @whitneywhtsang)
-
#6101 Reapply "[UT] Use pytest fixture in
test_divide.pyandtest_block_io.py" — Reapply "[UT] Use pytest fixture intest_divide.pyandtest_block_io.py". (+14/-4, @anmyachev) - #6094 Update PyTorch pin — Update PyTorch pin. (+1/-48, @anmyachev)
- #6093 Mark HW specific tests as xfail — Mark HW specific tests as xfail. (+23/-20, @whitneywhtsang)
- #6087 Revert "Skip some tutorials for B60 (#6000)" — Revert "Skip some tutorials for B60 (#6000)". (+0/-3, @anmyachev)
- #6052 Replace torch eager with sycl-tla as reference correctness check — Replace torch eager with sycl-tla as reference correctness check. (+84/-120, @mieshkiwrk)
- #6080 Update CACHE_NUMBER after 2f40fe1 — Update CACHE_NUMBER after 2f40fe1. (+1/-1, @whitneywhtsang)
- #6068 Add Copilot code-review custom instructions — Add Copilot code-review custom instructions. (+290/-0, @etiotto)
- #6054 Enable daily sglang and vllm benchmark runs on b580 — Enable daily sglang and vllm benchmark runs on b580. (+152/-65, @Egor-Krivov)
- #6069 Better installation messages — Better installation messages. (+49/-11, @Egor-Krivov)
-
#6050 Enable
test_side_effectful_reduction*on XPU — Enabletest_side_effectful_reduction*on XPU. (+7/-8, @anmyachev) - #6040 Remove w/a on seg fault clReleaseGlSharedEventINTEL — Remove w/a on seg fault clReleaseGlSharedEventINTEL. (+0/-4, @wdziurdz)
- #5948 Enhance remove layout for issue 5763 — Enhance remove layout for issue 5763. (+361/-56, @chengjunlu)
-
#6049 Add
Intel® Arc™ Pro B-Series Graphicsin README — AddIntel® Arc™ Pro B-Series Graphicsin README. (+3/-0, @anmyachev) - #6039 [LTS] Skip tests written for Rolling — [LTS] Skip tests written for Rolling. (+4/-2, @whitneywhtsang)
-
#6038 Use
IntelGPUErrorexception type inextract_spill_size_from_zebin(#6028) — UseIntelGPUErrorexception type inextract_spill_size_from_zebin(#6028). (+3/-2, @anmyachev) -
#6028 Use
IntelGPUErrorexception type inextract_spill_size_from_zebin— UseIntelGPUErrorexception type inextract_spill_size_from_zebin. (+3/-2, @anmyachev) - #6036 Remove Torch provider in FlexAttention causal benchmark — Remove Torch provider in FlexAttention causal benchmark. (+3/-16, @whitneywhtsang)
-
#6035 Fix
block_load_helper.py— Fixblock_load_helper.py. (+8/-14, @whitneywhtsang) - #5986 Limit custom mask flex attention shapes for B580 and enable paged runs — Limit custom mask flex attention shapes for B580 and enable paged runs. (+3/-5, @slawblauciak)
-
#6014 Enable TILE_SIZE in
unified_attentionkernel — Enable TILE_SIZE inunified_attentionkernel. (+42/-29, @Egor-Krivov) - #5785 Test CI for restore_value inside autotuner — Test CI for restore_value inside autotuner. (+16/-0, @mieshkiwrk)
- #6022 Unlock DeepSeek v3 decode shapes for causal benchmark — Unlock DeepSeek v3 decode shapes for causal benchmark. (+9/-2, @mieshkiwrk)
- #6023 Empty cache in custom masks — Empty cache in custom masks. (+11/-6, @whitneywhtsang)
-
#6020 Fix
softmax.h: non-void function does not return a value in all control pathswarning — Fixsoftmax.h: non-void function does not return a value in all control pathswarning. (+2/-0, @anmyachev) - #5998 Update PyTorch pin — Update PyTorch pin. (+1/-1, @anmyachev)
- #6015 Generalize version parsing — Generalize version parsing. (+2/-2, @whitneywhtsang)
- #5988 Count effective pairs for NATTEN benchmark — Count effective pairs for NATTEN benchmark. (+28/-9, @slawblauciak)
- #5989 Enable CUTLASS and OneDNN providers in FlexAttention causal benchmark — Enable CUTLASS and OneDNN providers in FlexAttention causal benchmark. (+64/-2, @wdziurdz)
- #6010 Revert temporary source code modification on 06 tutorial to align the public Triton code. — Revert temporary source code modification on 06 tutorial to align the public Triton code.. (+6/-17, @chengjunlu)
- #5919 Migrated benchmarks to TDs — Migrated benchmarks to TDs. (+161/-362, @Egor-Krivov)
- #6007 Skip test_sanitize_int_mul_overflow — Skip test_sanitize_int_mul_overflow. (+1/-0, @kwasd)
- #5601 Enable Proton for python/tutorials/09-persistent-matmul.py — Enable Proton for python/tutorials/09-persistent-matmul.py. (+4/-5, @anmyachev)
-
#6001 Skip case of
test_debug.py::test_sanitize_int_sub_overflow— Skip case oftest_debug.py::test_sanitize_int_sub_overflow. (+1/-0, @kwasd) - #6000 Skip some tutorials — Skip some tutorials. (+3/-0, @kwasd)
- #5658 Bump actions/upload-artifact from 5 to 6 — Bump actions/upload-artifact from 5 to 6. (+26/-26, @app/dependabot)
- #5660 Bump actions/download-artifact from 6 to 7 — Bump actions/download-artifact from 6 to 7. (+4/-4, @app/dependabot)
- #5996 Revert "Disable pre-commit check expand-yaml-anchors" — Revert "Disable pre-commit check expand-yaml-anchors". (+16/-17, @kwasd)
Synchronization merges tracking the upstream OpenAI Triton compiler throughout February.
28 upstream merges from OpenAI Triton (commits 2adfa7a, 68d5ecc, 3c26f56, 71c3148, 434aecb, ed24f4c, 3f74afe, 917dbde, 5ce5c68, 3c856db, 0ff3c91, 9a6af86, 9cdd0c3, 924ab52, cfeba5a, e2f9c9b, 05fc47f, c155e4a, ed4ef36, bb75a87, 483327f, 7509522, 0bc402c, 76e2689, 0ce9508, dad63bd, 7505c8c, 52998ef) — pass rate 97.52%–97.75%.