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[CIR][CIRGen] Add alignment attribute to AtomicCmpXchg #1327

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merged 4 commits into from
Feb 11, 2025
Merged

[CIR][CIRGen] Add alignment attribute to AtomicCmpXchg #1327

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dce891f
[CIR][CIRGen] Add alignment attribute to AtomicCmpXchg
FantasqueX Feb 8, 2025
b64c874
Use OptionalAttr instead of DefaulValuedAttr
FantasqueX Feb 10, 2025
80ed42e
Add alignment to assembly
FantasqueX Feb 10, 2025
19c40fc
format code
FantasqueX Feb 10, 2025
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1 change: 1 addition & 0 deletions clang/include/clang/CIR/Dialect/IR/CIROps.td
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Expand Up @@ -5390,6 +5390,7 @@ def AtomicCmpXchg : CIR_Op<"atomic.cmp_xchg",
CIR_AnyType:$desired,
Arg<MemOrder, "success memory order">:$succ_order,
Arg<MemOrder, "failure memory order">:$fail_order,
OptionalAttr<I64Attr>:$alignment,
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UnitAttr:$weak,
UnitAttr:$is_volatile);

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4 changes: 3 additions & 1 deletion clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
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Expand Up @@ -423,7 +423,9 @@ static void emitAtomicCmpXchg(CIRGenFunction &CGF, AtomicExpr *E, bool IsWeak,
auto boolTy = builder.getBoolTy();
auto cmpxchg = builder.create<cir::AtomicCmpXchg>(
loc, Expected.getType(), boolTy, Ptr.getPointer(), Expected, Desired,
SuccessOrder, FailureOrder);
cir::MemOrderAttr::get(&CGF.getMLIRContext(), SuccessOrder),
cir::MemOrderAttr::get(&CGF.getMLIRContext(), FailureOrder),
builder.getI64IntegerAttr(Ptr.getAlignment().getAsAlign().value()));
cmpxchg.setIsVolatile(E->isVolatile());
cmpxchg.setWeak(IsWeak);

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5 changes: 3 additions & 2 deletions clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
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Expand Up @@ -324,8 +324,9 @@ static mlir::Value MakeAtomicCmpXchgValue(CIRGenFunction &cgf,
auto op = builder.create<cir::AtomicCmpXchg>(
cgf.getLoc(expr->getSourceRange()), cmpVal.getType(), builder.getBoolTy(),
destAddr.getPointer(), cmpVal, newVal,
cir::MemOrder::SequentiallyConsistent,
cir::MemOrder::SequentiallyConsistent);
MemOrderAttr::get(&cgf.getMLIRContext(), cir::MemOrder::SequentiallyConsistent),
MemOrderAttr::get(&cgf.getMLIRContext(), cir::MemOrder::SequentiallyConsistent),
builder.getI64IntegerAttr(destAddr.getAlignment().getAsAlign().value()));

return returnBool ? op.getResult(1) : op.getResult(0);
}
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1 change: 1 addition & 0 deletions clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
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Expand Up @@ -3197,6 +3197,7 @@ mlir::LogicalResult CIRToLLVMAtomicCmpXchgLowering::matchAndRewrite(
op.getLoc(), adaptor.getPtr(), expected, desired,
getLLVMAtomicOrder(adaptor.getSuccOrder()),
getLLVMAtomicOrder(adaptor.getFailOrder()));
cmpxchg.setAlignment(adaptor.getAlignment());
cmpxchg.setWeak(adaptor.getWeak());
cmpxchg.setVolatile_(adaptor.getIsVolatile());

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2 changes: 1 addition & 1 deletion clang/test/CIR/CodeGen/atomic-xchg-field.c
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Expand Up @@ -55,7 +55,7 @@ void structAtomicExchange(unsigned referenceCount, wPtr item) {
// LLVM: store i32
// LLVM: %[[EXP:.*]] = load i32
// LLVM: %[[DES:.*]] = load i32
// LLVM: %[[RES:.*]] = cmpxchg weak ptr %9, i32 %[[EXP]], i32 %[[DES]] seq_cst seq_cst
// LLVM: %[[RES:.*]] = cmpxchg weak ptr %9, i32 %[[EXP]], i32 %[[DES]] seq_cst seq_cst, align 8
// LLVM: %[[OLD:.*]] = extractvalue { i32, i1 } %[[RES]], 0
// LLVM: %[[CMP:.*]] = extractvalue { i32, i1 } %[[RES]], 1
// LLVM: %[[FAIL:.*]] = xor i1 %[[CMP]], true
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