[X86] InstCombine: Generalize scalar SSE MAX/MIN intrinsics #175375
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This handles x86_sse_max_ss/min_ss and related intrinsics. It check if is known to be safe to convert them to llvm.maxnum/minnum
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llvm:instcombine
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@llvm/pr-subscribers-llvm-transforms Author: Guilherme oliveira de campos (guiolidc) ChangesThis patch handles x86_sse_max_ss/min_ss and related intrinsics. It check if is known to be safe to convert them to llvm.maxnum/minnum. These intrinsics can be converted to Full diff: https://github.com/llvm/llvm-project/pull/175375.diff 2 Files Affected:
diff --git a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
index 5eff38b214aef..d0df7fc7f5126 100644
--- a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
@@ -3138,6 +3138,48 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
return IC.replaceInstUsesWith(II, V);
}
break;
+
+ case Intrinsic::x86_sse_max_ss:
+ case Intrinsic::x86_sse_min_ss:
+ case Intrinsic::x86_sse2_max_sd:
+ case Intrinsic::x86_sse2_min_sd: {
+ Value *Arg0 = II.getArgOperand(0);
+ Value *Arg1 = II.getArgOperand(1);
+ unsigned VWidth = cast<FixedVectorType>(Arg0->getType())->getNumElements();
+
+ FPClassTest Forbidden = fcNan | fcInf | fcSubnormal | fcNegZero;
+ SimplifyQuery SQ = IC.getSimplifyQuery().getWithInstruction(&II);
+
+ APInt DemandedElts = APInt::getOneBitSet(VWidth, 0);
+ // Check if the first element of each vector is in a forbidden ,
+ // if they are safe, we can change this to generic MAXNUM/MINNUM
+ // instructions.
+ KnownFPClass KnownArg0 =
+ computeKnownFPClass(Arg0, DemandedElts, Forbidden, SQ);
+ KnownFPClass KnownArg1 =
+ computeKnownFPClass(Arg1, DemandedElts, Forbidden, SQ);
+
+ if (KnownArg0.isKnownNever(Forbidden) &&
+ KnownArg1.isKnownNever(Forbidden)) {
+ Value *Scalar0 = IC.Builder.CreateExtractElement(Arg0, (uint64_t)0);
+ Value *Scalar1 = IC.Builder.CreateExtractElement(Arg1, (uint64_t)0);
+
+ Value *NewScalar;
+ if (IID == Intrinsic::x86_sse_max_ss ||
+ IID == Intrinsic::x86_sse2_max_sd) {
+ NewScalar = IC.Builder.CreateMaxNum(Scalar0, Scalar1);
+ } else {
+ NewScalar = IC.Builder.CreateMinNum(Scalar0, Scalar1);
+ }
+ // Insert the result back into the bottom element (Index 0) of the first
+ // vector.
+ Value *Result =
+ IC.Builder.CreateInsertElement(Arg0, NewScalar, (uint64_t)0);
+ return IC.replaceInstUsesWith(II, Result);
+ }
+ break;
+ }
+
default:
break;
}
diff --git a/llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll b/llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll
new file mode 100644
index 0000000000000..9b46a84316433
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll
@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s
+
+define <4 x float> @test_max_ss_nan(<4 x float> %a) {
+ ; We pass a vector where the bottom element is NaN
+; CHECK-LABEL: define <4 x float> @test_max_ss_nan(
+; CHECK-SAME: <4 x float> [[A:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A]], <4 x float> <float 0x7FF8000000000000, float poison, float poison, float poison>)
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> <float 0x7FF8000000000000, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_min_ss_inf(<4 x float> %a) {
+; CHECK-LABEL: define <4 x float> @test_min_ss_inf(
+; CHECK-SAME: <4 x float> [[A:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[A]], <4 x float> <float 0x7FF0000000000000, float poison, float poison, float poison>)
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a, <4 x float> <float 0x7FF0000000000000, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_max_ss_neg_zero(<4 x float> %a) {
+; CHECK-LABEL: define <4 x float> @test_max_ss_neg_zero(
+; CHECK-SAME: <4 x float> [[A:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A]], <4 x float> <float -0.000000e+00, float poison, float poison, float poison>)
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> <float -0.0, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_max_ss_variable_unsafe(<4 x float> %a, <4 x float> %b) {
+; CHECK-LABEL: define <4 x float> @test_max_ss_variable_unsafe(
+; CHECK-SAME: <4 x float> [[A:%.*]], <4 x float> [[B:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A]], <4 x float> [[B]])
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> %b)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_max_ss_safe_constants() {
+; CHECK-LABEL: define <4 x float> @test_max_ss_safe_constants() {
+; CHECK-NEXT: ret <4 x float> <float 2.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> <float 1.0, float 0.0, float 0.0, float 0.0>, <4 x float> <float 2.0, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
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Member
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@llvm/pr-subscribers-backend-x86 Author: Guilherme oliveira de campos (guiolidc) ChangesThis patch handles x86_sse_max_ss/min_ss and related intrinsics. It check if is known to be safe to convert them to llvm.maxnum/minnum. These intrinsics can be converted to Full diff: https://github.com/llvm/llvm-project/pull/175375.diff 2 Files Affected:
diff --git a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
index 5eff38b214aef..d0df7fc7f5126 100644
--- a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
@@ -3138,6 +3138,48 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
return IC.replaceInstUsesWith(II, V);
}
break;
+
+ case Intrinsic::x86_sse_max_ss:
+ case Intrinsic::x86_sse_min_ss:
+ case Intrinsic::x86_sse2_max_sd:
+ case Intrinsic::x86_sse2_min_sd: {
+ Value *Arg0 = II.getArgOperand(0);
+ Value *Arg1 = II.getArgOperand(1);
+ unsigned VWidth = cast<FixedVectorType>(Arg0->getType())->getNumElements();
+
+ FPClassTest Forbidden = fcNan | fcInf | fcSubnormal | fcNegZero;
+ SimplifyQuery SQ = IC.getSimplifyQuery().getWithInstruction(&II);
+
+ APInt DemandedElts = APInt::getOneBitSet(VWidth, 0);
+ // Check if the first element of each vector is in a forbidden ,
+ // if they are safe, we can change this to generic MAXNUM/MINNUM
+ // instructions.
+ KnownFPClass KnownArg0 =
+ computeKnownFPClass(Arg0, DemandedElts, Forbidden, SQ);
+ KnownFPClass KnownArg1 =
+ computeKnownFPClass(Arg1, DemandedElts, Forbidden, SQ);
+
+ if (KnownArg0.isKnownNever(Forbidden) &&
+ KnownArg1.isKnownNever(Forbidden)) {
+ Value *Scalar0 = IC.Builder.CreateExtractElement(Arg0, (uint64_t)0);
+ Value *Scalar1 = IC.Builder.CreateExtractElement(Arg1, (uint64_t)0);
+
+ Value *NewScalar;
+ if (IID == Intrinsic::x86_sse_max_ss ||
+ IID == Intrinsic::x86_sse2_max_sd) {
+ NewScalar = IC.Builder.CreateMaxNum(Scalar0, Scalar1);
+ } else {
+ NewScalar = IC.Builder.CreateMinNum(Scalar0, Scalar1);
+ }
+ // Insert the result back into the bottom element (Index 0) of the first
+ // vector.
+ Value *Result =
+ IC.Builder.CreateInsertElement(Arg0, NewScalar, (uint64_t)0);
+ return IC.replaceInstUsesWith(II, Result);
+ }
+ break;
+ }
+
default:
break;
}
diff --git a/llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll b/llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll
new file mode 100644
index 0000000000000..9b46a84316433
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll
@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s
+
+define <4 x float> @test_max_ss_nan(<4 x float> %a) {
+ ; We pass a vector where the bottom element is NaN
+; CHECK-LABEL: define <4 x float> @test_max_ss_nan(
+; CHECK-SAME: <4 x float> [[A:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A]], <4 x float> <float 0x7FF8000000000000, float poison, float poison, float poison>)
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> <float 0x7FF8000000000000, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_min_ss_inf(<4 x float> %a) {
+; CHECK-LABEL: define <4 x float> @test_min_ss_inf(
+; CHECK-SAME: <4 x float> [[A:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[A]], <4 x float> <float 0x7FF0000000000000, float poison, float poison, float poison>)
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a, <4 x float> <float 0x7FF0000000000000, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_max_ss_neg_zero(<4 x float> %a) {
+; CHECK-LABEL: define <4 x float> @test_max_ss_neg_zero(
+; CHECK-SAME: <4 x float> [[A:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A]], <4 x float> <float -0.000000e+00, float poison, float poison, float poison>)
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> <float -0.0, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_max_ss_variable_unsafe(<4 x float> %a, <4 x float> %b) {
+; CHECK-LABEL: define <4 x float> @test_max_ss_variable_unsafe(
+; CHECK-SAME: <4 x float> [[A:%.*]], <4 x float> [[B:%.*]]) {
+; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A]], <4 x float> [[B]])
+; CHECK-NEXT: ret <4 x float> [[RES]]
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> %b)
+ ret <4 x float> %res
+}
+
+define <4 x float> @test_max_ss_safe_constants() {
+; CHECK-LABEL: define <4 x float> @test_max_ss_safe_constants() {
+; CHECK-NEXT: ret <4 x float> <float 2.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>
+;
+ %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> <float 1.0, float 0.0, float 0.0, float 0.0>, <4 x float> <float 2.0, float 0.0, float 0.0, float 0.0>)
+ ret <4 x float> %res
+}
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Fixes #175162
This patch handles x86_sse_max_ss/min_ss and related intrinsics. It check if is known to be safe to convert them to llvm.maxnum/minnum.
These intrinsics can be converted to
@llvm.maxnumand@llvm.minnum. This optimization can be done if the inputs are free of: NaN, Inf, Subnormal, and NegZero. If it is not sure to be free of these, the instructions remain the same.