samples: SPI sample#761
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You can find the documentation preview for this PR here. |
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Some overall comments not diving in to the code.
| #ifndef BOARD_APP_UARTE_INST | ||
| #define BOARD_APP_UARTE_INST NRF_UARTE30 | ||
| /* Application SPI master configuration */ | ||
| #ifndef BOARD_APP_SPIM_INST |
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We need board config for the other boards as well.
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You are right, this does however mean we need a bit of refactoring of the code, because not all SoC support master and slave SPI peripherals at the same time without modifying the board (eks: nRF54LV10)
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Ok I added new boards and refactored code and documentation to fit with the new sample code
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Add SPI sample with SPIM and SPIS support. Button 2 triggers a master transfer, LED 2 toggles on slave reception. Includes: - SPIM and SPIS initialization and transfer handling - Board configuration with default pin mappings for all supported DKs - Kconfig option for configurable message string - Documentation with wiring guide, pin conflict notes, and testing steps Signed-off-by: Martynas Smilingis <martynas.smilingis@nordicsemi.no>
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Add SPI sample with SPIM and SPIS support for single-device loopback and two-device setups (one or two data paths). Button 2 triggers a master transfer, LED 2 toggles on slave reception.
Includes: