softdevice_controller: align to nrfx 4.0

crypto/nrf_cc310_platform/include/nrf_cc3xx_platform_kmu.h

@@ -15,7 +15,7 @@
 
 #include <stdint.h>
 #include <stddef.h>
-#include "nrf.h"
+#include "nrfx.h"
 
 #if defined(NRF91_SERIES) || defined(NRF5340_XXAA_APPLICATION)
 

crypto/nrf_cc312_platform/include/nrf_cc3xx_platform_kmu.h

@@ -15,7 +15,7 @@
 
 #include <stdint.h>
 #include <stddef.h>
-#include "nrf.h"
+#include "nrfx.h"
 
 #if defined(NRF91_SERIES) || defined(NRF5340_XXAA_APPLICATION)
 

gzll/include/nrf_gzll.h

@@ -12,8 +12,7 @@
 #ifndef NRF_GZLL_H__
 #define NRF_GZLL_H__
 
-#include <stdbool.h>
-#include "nrf.h"
+#include "nrfx.h"
 #include "nrf_gzll_constants.h"
 
 #ifdef __cplusplus

gzll/include/nrf_gzll_glue.h

@@ -14,8 +14,7 @@
  * File defines a set of functions and variables called by Gazell Link Layer.
  */
 
-#include <nrf.h>
-#include <nrf_peripherals.h>
+#include <nrfx.h>
 
 #ifdef __cplusplus
 extern "C" {

mpsl/fem/include/mpsl_fem_config_common.h

@@ -19,7 +19,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
-#include <nrf.h>
+#include <nrfx.h>
 
 #ifdef __cplusplus
 extern "C" {

mpsl/fem/include/protocol/mpsl_fem_protocol_api.h

@@ -23,8 +23,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 
-#include <nrf.h>
-#include <nrf_peripherals.h>
+#include <nrfx.h>
 #include "nrf_errno.h"
 #include "mpsl_tx_power.h"
 #include "mpsl_fem_types.h"

mpsl/fem/nrf21540_gpio/include/mpsl_fem_config_nrf21540_gpio.h

@@ -20,7 +20,7 @@
 #include <stdbool.h>
 #include "mpsl_fem_config_common.h"
 #include "mpsl_fem_config_nrf21540_common.h"
-#include "nrf.h"
+#include "nrfx.h"
 
 #ifdef __cplusplus
 extern "C" {

mpsl/fem/nrf21540_gpio_spi/include/mpsl_fem_config_nrf21540_gpio_spi.h

@@ -20,7 +20,7 @@
 #include <stdbool.h>
 #include "mpsl_fem_config_common.h"
 #include "mpsl_fem_config_nrf21540_common.h"
-#include "nrf.h"
+#include "nrfx.h"
 
 #ifdef __cplusplus
 extern "C" {

mpsl/fem/nrf2220/include/mpsl_fem_config_nrf2220.h

@@ -21,7 +21,7 @@
 
 #include "mpsl_fem_config_common.h"
 #include "mpsl_fem_nrf22xx_twi_config_common.h"
-#include "nrf.h"
+#include "nrfx.h"
 
 #ifdef __cplusplus
 extern "C" {

mpsl/fem/nrf2240/include/mpsl_fem_config_nrf2240.h

@@ -21,7 +21,7 @@
 
 #include "mpsl_fem_config_common.h"
 #include "mpsl_fem_nrf22xx_twi_config_common.h"
-#include "nrf.h"
+#include "nrfx.h"
 
 #ifdef __cplusplus
 extern "C" {

mpsl/fem/nrf22xx/include/mpsl_fem_nrf22xx_twi_config_common.h

@@ -20,7 +20,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
-#include <nrf.h>
+#include <nrfx.h>
 #include <nrf_errno.h>
 
 #include <mpsl_fem_config_common.h>

mpsl/fem/simple_gpio/include/mpsl_fem_config_simple_gpio.h

@@ -19,7 +19,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "mpsl_fem_config_common.h"
-#include "nrf.h"
+#include "nrfx.h"
 
 #ifdef __cplusplus
 extern "C" {

mpsl/include/mpsl.h

@@ -22,11 +22,11 @@ extern "C" {
 
 #include <stdint.h>
 #include <stdbool.h>
-#include "nrf.h"
-#include "nrf_peripherals.h"
+#include "nrfx.h"
 #include "nrf_errno.h"
 #include "mpsl_clock.h"
 #include "mpsl_hwres.h"
+#include "mpsl_dppi.h"
 
 /** @brief High IRQ priority
  *

mpsl/include/mpsl_clock.h

@@ -23,8 +23,7 @@ extern "C" {
 
 #include <stdint.h>
 #include <stdbool.h>
-#include "nrf.h"
-#include "nrf_errno.h"
+#include "nrfx.h"
 #if !defined (NRF54H_SERIES) && !defined (NRF92_SERIES)
 #include "hal/nrf_clock.h"
 #endif /* !NRF54H20_XXAA && !NRF92H20_XXAA */

mpsl/include/mpsl_dppi.h

@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/**
+ * @file mpsl_dppi.h
+ *
+ * @defgroup mpsl_dppi MPSL DPPI API
+ * @ingroup  mpsl
+ *
+ * This file defines an API to dynamically allocate some of hardware
+ * resources. The allocation functions are expected to be implemented
+ * outside of the MPSL.
+ * @{
+ */
+
+#ifndef MPSL_DPPI_H__
+#define MPSL_DPPI_H__
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(DPPI_PRESENT) || defined(DOXYGEN)
+
+/** @brief Allocate a DPPI channel of a DPPIC controller instance.
+ *
+ *  @param[in]  p_dppic    Pointer to a DPPIC controller instance.
+ *  @param[out] p_dppi_ch  Allocated DPPI channel number on the given DPPIC instance.
+ *                         Value written at this pointer is valid only on successful
+ *                         allocation.
+ *
+ *  @retval true   Allocation successful.
+ *  @retval false  Allocation failed.
+ */
+bool mpsl_hwres_dppi_channel_alloc(NRF_DPPIC_Type * p_dppic, uint8_t * p_dppi_ch);
+
+#endif /* DPPI_PRESENT */
+
+#if defined(PPIB_PRESENT) || defined(DOXYGEN)
+
+/** @brief Allocate a PPIB channel of a PPIB-to-PPIB interconnection.
+ *
+ * @param[in]  p_ppib    Pointer to a PPIB instance.
+ * @param[out] p_ppib_ch Allocated PPIB channel number the for PPIB-to-PPIB
+ *                       interconnection identified by the @p p_ppib being one
+ *                       of the sides of the interconnection.
+ *                       Value written at this pointer valid only on successful
+ *                       allocation.
+ *
+ *  @retval true   Allocation successful.
+ *  @retval false  Allocation failed.
+ */
+bool mpsl_hwres_ppib_channel_alloc(NRF_PPIB_Type * p_ppib, uint8_t * p_ppib_ch);
+
+#endif /* PPIB_PRESENT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // MPSL_DPPI_H__
+
+/**@} */

mpsl/include/mpsl_hwres.h

@@ -11,9 +11,6 @@
  * @ingroup  mpsl
  *
  * This file defines fixed hardware resources used by the MPSL.
- * It also defines an API to dynamically allocate some of hardware
- * resources. The allocation functions are expected to be implemented
- * outside of the MPSL.
  * @{
  */
 
@@ -22,81 +19,45 @@
 
 #include <stdbool.h>
 #include <stdint.h>
-#include "nrf.h"
-#include "nrf_peripherals.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-/* Reserved (D)PPI, PPIB and IPCT resources for the supported platforms. */
+#include "nrfx.h"
+#include "mpsl_hwres_zephyr.h"
+
 #if defined(NRF52_SERIES)
-    #define MPSL_RESERVED_PPI_CHANNELS ((1UL << 19) | (1UL << 30) | (1UL << 31))
-    /* This corresponds to the PPI channels 19, 30, and 31. */
-    #define MPSL_PPI_CHANNELS_USED_MASK (0xc0080000)
+#define MPSL_RESERVED_PPI_CHANNELS ((1UL << 19) | (1UL << 30) | (1UL << 31))
+#define MPSL_PPI_CHANNELS_USED_MASK MPSL_NRF52_PPI_CHANNELS_USED_MASK
 #elif defined(NRF53_SERIES)
-    #define MPSL_RESERVED_PPI_CHANNELS ((1UL << 0) | (1UL << 1) | (1UL << 2))
-    /* This corresponds to the DPPI channels 0, 1, and 2. */
-    #define MPSL_DPPIC_CHANNELS_USED_MASK (0x00000007)
-#elif defined(LUMOS_XXAA)
-    #define MPSL_RESERVED_PPI_CHANNELS (1UL << 0)
-    #define MPSL_DPPIC10_CHANNELS_USED_MASK (0x00000001)
-    #define MPSL_DPPIC20_CHANNELS_USED_MASK (0x00000001)
-    #define MPSL_PPIB11_CHANNELS_USED_MASK  (0x00000001)
-    #define MPSL_PPIB21_CHANNELS_USED_MASK  (0x00000001)
+#define MPSL_RESERVED_PPI_CHANNELS ((1UL << 0) | (1UL << 1) | (1UL << 2))
+#define MPSL_DPPIC_CHANNELS_USED_MASK MPSL_NRF53_DPPIC_CHANNELS_USED_MASK
+#elif defined(NRF54L_SERIES)
+#define MPSL_RESERVED_PPI_CHANNELS (1UL << 0)
+#define MPSL_DPPIC10_CHANNELS_USED_MASK MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK
+#define MPSL_DPPIC20_CHANNELS_USED_MASK MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK
+#define MPSL_PPIB11_CHANNELS_USED_MASK  MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK
+#define MPSL_PPIB21_CHANNELS_USED_MASK  MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK
 #elif defined(NRF54H_SERIES) || defined(GRTC_PRESENT)
-    #define MPSL_RESERVED_PPI_CHANNELS (1UL << 0)
-    #define MPSL_DPPIC020_CHANNELS_USED_MASK (0x00000001)
-    #define MPSL_IPCT130_CHANNELS_USED_MASK  (0x00000001)
+#define MPSL_RESERVED_PPI_CHANNELS (1UL << 0)
+#define MPSL_DPPIC020_CHANNELS_USED_MASK MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK
+#define MPSL_IPCT130_CHANNELS_USED_MASK  MPSL_NRF54H_IPCT130_CHANNELS_USED_MASK
 #else
-    #error Unknown NRF series.
+#error Unknown NRF series.
 #endif
 
 /* Defines which timer is being used by the MPSL implementation */
 #if defined(NRF52_SERIES)
-    #define MPSL_TIMER0 NRF_TIMER0
+	#define MPSL_TIMER0 NRF_TIMER0
 #elif defined(NRF53_SERIES)
-    #define MPSL_TIMER0 NRF_TIMER0_NS
-#elif defined(LUMOS_XXAA)
-    #define MPSL_TIMER0 NRF_TIMER10
+	#define MPSL_TIMER0 NRF_TIMER0_NS
+#elif defined(NRF54L_SERIES)
+	#define MPSL_TIMER0 NRF_TIMER10
 #else
-    #define MPSL_TIMER0 NRF_TIMER020
+	#define MPSL_TIMER0 NRF_TIMER020
 #endif
 
-#if defined(DPPI_PRESENT) || defined(DOXYGEN)
-
-/** @brief Allocate a DPPI channel of a DPPIC controller instance.
- *
- *  @param[in]  p_dppic    Pointer to a DPPIC controller instance.
- *  @param[out] p_dppi_ch  Allocated DPPI channel number on the given DPPIC instance.
- *                         Value written at this pointer is valid only on successful
- *                         allocation.
- *
- *  @retval true   Allocation successful.
- *  @retval false  Allocation failed.
- */
-bool mpsl_hwres_dppi_channel_alloc(NRF_DPPIC_Type * p_dppic, uint8_t * p_dppi_ch);
-
-#endif /* DPPI_PRESENT */
-
-#if defined(PPIB_PRESENT) || defined(DOXYGEN)
-
-/** @brief Allocate a PPIB channel of a PPIB-to-PPIB interconnection.
- *
- * @param[in]  p_ppib    Pointer to a PPIB instance.
- * @param[out] p_ppib_ch Allocated PPIB channel number the for PPIB-to-PPIB
- *                       interconnection identified by the @p p_ppib being one
- *                       of the sides of the interconnection.
- *                       Value written at this pointer valid only on successful
- *                       allocation.
- *
- *  @retval true   Allocation successful.
- *  @retval false  Allocation failed.
- */
-bool mpsl_hwres_ppib_channel_alloc(NRF_PPIB_Type * p_ppib, uint8_t * p_ppib_ch);
-
-#endif /* PPIB_PRESENT */
-
 #ifdef __cplusplus
 }
 #endif

mpsl/include/mpsl_hwres_zephyr.h

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/**
+ * @file mpsl_hwres_zephyr.h
+ *
+ * @defgroup mpsl_hwres MPSL hardware resources API for Zephyr
+ * @ingroup  mpsl
+ *
+ * This file defines fixed hardware resources used by the MPSL in Zephyr.
+ * @{
+ */
+
+#ifndef MPSL_HWRES_ZEPHYR_H__
+#define MPSL_HWRES_ZEPHYR_H__
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Reserved (D)PPI, PPIB and IPCT resources for the supported platforms. */
+/* This corresponds to the PPI channels 19, 30, and 31. */
+#define MPSL_NRF52_PPI_CHANNELS_USED_MASK       (0xc0080000)
+/* This corresponds to the DPPI channels 0, 1, and 2. */
+#define MPSL_NRF53_DPPIC_CHANNELS_USED_MASK     (0x00000007)
+#define MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK  (0x00000001)
+#define MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK  (0x00000001)
+#define MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK   (0x00000001)
+#define MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK   (0x00000001)
+#define MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK (0x00000001)
+#define MPSL_NRF54H_IPCT130_CHANNELS_USED_MASK  (0x00000001)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // MPSL_HWRES_ZEPHYR_H__
+
+/**@} */

mpsl/include/mpsl_timeslot.h

@@ -25,8 +25,7 @@ extern "C" {
 #endif
 
 #include <stdint.h>
-#include "nrf.h"
-#include "nrf_peripherals.h"
+#include "nrfx.h"
 #include "nrf_errno.h"
 
 /** @brief The shortest allowed timeslot event in microseconds. */

mpsl/include/protocol/mpsl_dppi_protocol_api.h

@@ -7,7 +7,7 @@
 #ifndef MPSL_DPPI_PROTOCOL_API_H__
 #define MPSL_DPPI_PROTOCOL_API_H__
 
-#include "nrf_peripherals.h"
+#include "nrfx.h"
 #if (defined DPPIC_PRESENT || defined DOXYGEN)
 
 /**

nrf_802154/driver/src/nrf_802154_swi.c

@@ -43,7 +43,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#include "compiler_abstraction.h"
+#include "nrfx.h"
 #include "nrf_802154.h"
 #include "nrf_802154_config.h"
 #include "platform/nrf_802154_irq.h"