[CPU][RV64] Implemented jit_ceil_emitter#33195
[CPU][RV64] Implemented jit_ceil_emitter#33195aobolensk merged 7 commits intoopenvinotoolkit:masterfrom
Conversation
| auto dst = VReg(out_vec_idxs[0]); | ||
| auto aux1 = VReg(aux_vec_idxs[0]); | ||
| auto fp1 = FReg(aux_fp_gpr_idxs[0]); | ||
| h->vmv_v_v(aux1, src); |
There was a problem hiding this comment.
It seems this data copy is actually not needed. You may take src on line 174 instead of aux1
There was a problem hiding this comment.
It seems this is still unused and could be removed. So we save up 1 aux register and remove vmv.v.v instruction.
There was a problem hiding this comment.
I've applied the suggested changes. Please take a look when you have time.
|
Hi @aobolensk, I’ve applied the suggested changes. Please take a look whenever you have time. |
Hi @arunthakur009 , please, take a look at clang-format (reported by CI) remarks as well |
|
@aobolensk I've fixed the clang-format issue. Please take a look when you have time. |
|
Hi, @aobolensk I've fixed the clang-format issue. Please take a look when you have time. |
|
build_jenkins |
|
build_jenkins |
aobolensk
left a comment
There was a problem hiding this comment.
LGTM! Thank you for your contribution!
**Details:** - Implemented a JIT emitter for the fp32 Ceil operation on the RISC-V64 platform with RVV1.0 support. Integrated into the RISC-V JIT backend and registered in the kernel. **Tickets:** openvinotoolkit#30227 --------- Co-authored-by: Arseniy Obolenskiy <arseniy.obolenskiy@intel.com>
Details:
Tickets:
#30227