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    42 repositories

    • VexiiRiscv

      Public
      Like VexRiscv, but, Harder, Better, Faster, Stronger
      Scala
      •
      MIT License
      •40•200•15•1•Updated Jan 27, 2026Jan 27, 2026

    • SpinalDoc-RTD

      Public
      The sources of the online SpinalHDL doc
      documentationspinalhdl
      Python
      •
      Creative Commons Zero v1.0 Universal
      •66•30•21•7•Updated Jan 27, 2026Jan 27, 2026

    • SpinalHDL

      Public
      Scala based HDL
      scalafpgavhdlrtlverilog
      Scala
      •
      Other
      •367•1.9k•160•39•Updated Jan 27, 2026Jan 27, 2026

    • NaxRiscv

      Public
      Scala
      •
      MIT License
      •48•305•44•0•Updated Jan 23, 2026Jan 23, 2026

    • rvls

      Public
      RISCV lock-step checker based on Spike
      C++
      •4•14•0•0•Updated Jan 23, 2026Jan 23, 2026

    • VexiiRiscv-RTD

      Public
      Python
      •
      Creative Commons Zero v1.0 Universal
      •4•3•0•1•Updated Jan 20, 2026Jan 20, 2026

    • VexRiscv

      Public
      A FPGA friendly 32 bit RISC-V CPU implementation
      cpufpgavhdlriscvverilogsocspinalhdlsoftcore
      Assembly
      •
      MIT License
      •486•3k•116•7•Updated Dec 15, 2025Dec 15, 2025

    • riscv-isa-sim

      Public
      Spike, a RISC-V ISA Simulator
      C
      •
      Other
      •1k•2•0•0•Updated Nov 10, 2025Nov 10, 2025

    • SpinalTemplateSbt

      Public template
      A basic SpinalHDL project
      Scala
      •73•89•5•5•Updated Aug 15, 2025Aug 15, 2025

    • NaxSoftware

      Public
      C
      •7•11•0•0•Updated Jul 14, 2025Jul 14, 2025

    • CocotbLib

      Public
      Python
      •
      MIT License
      •8•18•1•21•Updated Jul 9, 2025Jul 9, 2025

    • docker

      Public
      Dockerfile
      •6•3•1•1•Updated Jul 4, 2025Jul 4, 2025

    • SpinalSchemaGen

      Public
      Scala
      •
      MIT License
      •1•6•0•0•Updated Mar 17, 2025Mar 17, 2025

    • SaxonSoc

      Public
      SoC based on VexRiscv and ICE40 UP5K
      riscvrtlsoc
      Scala
      •
      MIT License
      •41•161•15•0•Updated Mar 16, 2025Mar 16, 2025

    • openocd_riscv

      Public
      Spen's Official OpenOCD Mirror
      C
      •
      Other
      •954•51•11•0•Updated Mar 10, 2025Mar 10, 2025

    • SpinalTemplateSbtDependencies

      Public
      An SpinalHDL project example which use VexRiscv git as a dependency
      Scala
      •3•4•0•0•Updated Feb 12, 2025Feb 12, 2025

    • VexiiFirmware

      Public
      C
      •1•2•0•0•Updated Jan 6, 2025Jan 6, 2025

    • SpinalDoc

      Public
      SpinalHDL documentation assets (pictures, slides, ...)
      HTML
      •13•31•0•0•Updated Dec 10, 2024Dec 10, 2024

    • SpinalCrypto

      Public
      SpinalHDL - Cryptography libraries
      cryptographyscalacryptofpgaaesvhdlmd5shartlverilog
      Scala
      •
      MIT License
      •20•58•3•0•Updated Jul 19, 2024Jul 19, 2024

    • SpinalWorkshop

      Public
      Labs to learn SpinalHDL
      Scala
      •42•152•7•0•Updated Jul 4, 2024Jul 4, 2024

    • Spinal-bootcamp

      Public
      SpinalHDL-tutorial based on Jupyter Notebook
      Jupyter Notebook
      •48•47•0•0•Updated Apr 9, 2024Apr 9, 2024

    • NaxRiscv-Rtd

      Public
      Python
      •3•2•0•0•Updated Feb 15, 2024Feb 15, 2024

    • naxriscv_doc

      Public
      MIT License
      •4•0•0•0•Updated Dec 19, 2023Dec 19, 2023

    • embench-iot

      Public
      The main Embench repository
      C
      •
      GNU General Public License v3.0
      •128•0•0•0•Updated Dec 1, 2023Dec 1, 2023

    • SpinalTemplateGradle

      Public
      A basic SpinalHDL project, configured with Gradle instead of SBT
      spinalhdl
      Scala
      •3•4•1•1•Updated Jul 5, 2023Jul 5, 2023

    • buildroot-spinal-saxon

      Public
      C
      •6•2•0•0•Updated Oct 3, 2022Oct 3, 2022

    • linux

      Public
      C
      •
      Other
      •1•0•0•0•Updated Sep 5, 2022Sep 5, 2022

    • riscv-compliance

      Public
      Assembly
      •
      BSD 3-Clause "New" or "Revised" License
      •262•0•0•0•Updated Mar 15, 2022Mar 15, 2022

    • coremark

      Public
      CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
      C
      •
      Other
      •392•0•0•0•Updated Dec 22, 2021Dec 22, 2021

    • VexRiscvSocSoftware

      Public
      C
      •16•27•0•0•Updated Dec 15, 2021Dec 15, 2021