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    158 repositories

    • rv-sparse

      Public
      Open-source RISC-V Vector accelerated sparse linear algebra library.
      Python
      •
      GNU General Public License v3.0
      •6•8•3•2•Updated May 2, 2026May 2, 2026

    • ooo-core

      Public
      C++
      •0•0•0•2•Updated Apr 29, 2026Apr 29, 2026

    • nucleusrv

      Public
      NucleusRV (RV32-IMAFC) - A 32-bit 5 staged pipelined risc-v core.
      cpufpgariscv
      cpufpgariscv
      Assembly
      •
      GNU General Public License v3.0
      •40•79•13•7•Updated Apr 29, 2026Apr 29, 2026

    • ai4org

      Public
      Hallucination reduction framework for LLMs using RAG, multi-discriminator RL, and automated data pipelines.
      Python
      •
      GNU General Public License v3.0
      •5•1•40•1•Updated Feb 10, 2026Feb 10, 2026

    • genify

      Public
      Jupyter Notebook
      •0•0•0•0•Updated Feb 7, 2026Feb 7, 2026

    • European-Summer-of-Code

      Public
      Project Ideas for European Summers of code
      0•0•0•0•Updated Feb 6, 2026Feb 6, 2026

    • CacheMatic

      Public
      Scala
      •
      MIT License
      •2•1•0•0•Updated Feb 4, 2026Feb 4, 2026

    • oxygen

      Public
      A RISC-V Simulator
      Python
      •
      GNU General Public License v3.0
      •4•7•0•0•Updated Jan 30, 2026Jan 30, 2026

    • Google-Summer-of-Code

      Public
      Project ideas list for Google Summer of Code.
      projectsriscvgsoc
      projectsriscvgsoc
      2•18•0•0•Updated Jan 28, 2026Jan 28, 2026

    • APQCrypt

      Public
      Post Quantum Adaptive Encryption Secure Communication System
      GNU General Public License v3.0
      •0•0•0•0•Updated Jan 27, 2026Jan 27, 2026

    • caravan

      Public
      A caravan equipped with API for creating bus protocols in Chisel with ease.
      chisel3wishbonecaravan
      chisel3wishbonecaravanambachisel-generatoron-chip-networkbus-protocols
      Scala
      •
      Apache License 2.0
      •12•14•4•0•Updated Jan 15, 2026Jan 15, 2026

    • renode-nucleusrv

      Public
      Shell
      •1•0•0•0•Updated Jan 14, 2026Jan 14, 2026

    • Athestia

      Public
      Clean slate application using NDN with Dilithium to enhance security in future internet technology
      SystemVerilog
      •0•3•0•0•Updated Jan 13, 2026Jan 13, 2026

    • coco-rvtb

      Public
      Generic testbench for RISC-V CPUs
      riscvuvmcocotb
      riscvuvmcocotbpyuvm
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •10•12•0•0•Updated Dec 13, 2025Dec 13, 2025

    • Burq-Suite

      Public
      An All in one RISC-V Suite.
      JavaScript
      •3•5•0•0•Updated Oct 10, 2025Oct 10, 2025

    • XSoC-Lite

      Public
      Modular eXtensible SoC (RV32IMCF + BabyKyber accelerator)
      C++
      •0•0•0•0•Updated Oct 8, 2025Oct 8, 2025

    • vaquita

      Public
      Scala
      •
      GNU General Public License v3.0
      •6•18•0•1•Updated Oct 6, 2025Oct 6, 2025

    • MERL-Attendance

      Public
      Python
      •1•0•0•0•Updated Sep 28, 2025Sep 28, 2025

    • XSoC-SDK

      Public
      SDK for Modular eXtensible SoC
      C
      •1•0•0•0•Updated Sep 27, 2025Sep 27, 2025

    • riscv-dv

      Public
      Random instruction generator for RISC-V processor verification
      Python
      •
      Apache License 2.0
      •381•0•0•1•Updated Sep 7, 2025Sep 7, 2025

    • Scala-Chisel-Learning-Journey

      Public
      This repository is for students to go through the Learning Journey for CHISEL and Funcitonal Programming with SCALA also perform tasks related to it.
      Jupyter Notebook
      •76•15•0•0•Updated Sep 7, 2025Sep 7, 2025

    • pristine-chipyard

      Public
      An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •855•0•0•1•Updated Aug 31, 2025Aug 31, 2025

    • autovar

      Public
      MIT License
      •0•0•0•1•Updated Aug 27, 2025Aug 27, 2025

    • hammer

      Public
      Infrastructure to drive Spike (RISC-V ISA Simulator) in cosim mode. Hammer provides a C++ and Python interface to interact with Spike.
      C++
      •10•3•0•0•Updated Aug 26, 2025Aug 26, 2025

    • TCAM-generator

      Public
      Chisel generator based on OpenTCAM, to be used w. merledu/pristine-chipyard
      SystemVerilog
      •1•0•0•0•Updated Aug 23, 2025Aug 23, 2025

    • LFX-Mentorship

      Public
      LFX Mentorship: Projects and Coding Challenges
      54•4•0•1•Updated Jul 25, 2025Jul 25, 2025

    • SHA3-256

      Public
      SystemVerilog
      •0•0•0•0•Updated Jun 25, 2025Jun 25, 2025

    • KyberQuanta

      Public
      A Kyber768-90's Hardware Accelerator.
      SystemVerilog
      •3•4•0•0•Updated Jun 15, 2025Jun 15, 2025

    • aegis

      Public
      MIT License
      •1•0•0•1•Updated May 14, 2025May 14, 2025

    • SoC-Now-Generator

      Public
      An open source Mini SoC Generator which will generate SoC based on parameters.
      Verilog
      •1•3•8•1•Updated Mar 25, 2025Mar 25, 2025
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