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Commit 69451f7

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add satp mode guard
1 parent fbd69b4 commit 69451f7

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2 files changed

+23
-3
lines changed

2 files changed

+23
-3
lines changed

model/riscv_extensions.sail

+6
Original file line numberDiff line numberDiff line change
@@ -116,3 +116,9 @@ enum clause extension = Ext_Svpbmt
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// Cycle and Instret Privilege Mode Filtering
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enum clause extension = Ext_Smcntrpmf
119+
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// supervisor-level address translation modes
121+
enum clause extension = Ext_Sv32
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enum clause extension = Ext_Sv39
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enum clause extension = Ext_Sv48
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enum clause extension = Ext_Sv57

model/riscv_sys_regs.sail

+17-3
Original file line numberDiff line numberDiff line change
@@ -160,6 +160,12 @@ function sys_enable_supervisor() -> bool = true
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function clause extensionEnabled(Ext_U) = misa[U] == 0b1
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function clause extensionEnabled(Ext_S) = misa[S] == 0b1
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163+
// now remain for true
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function clause extensionEnabled(Ext_Sv32) = extensionEnabled(Ext_S) & (xlen == 32)
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function clause extensionEnabled(Ext_Sv39) = extensionEnabled(Ext_S) & (xlen == 64)
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function clause extensionEnabled(Ext_Sv48) = extensionEnabled(Ext_S) & (xlen == 64)
167+
function clause extensionEnabled(Ext_Sv57) = extensionEnabled(Ext_S) & (xlen == 64)
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/*
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* Illegal values legalized to least privileged mode supported.
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* Note: the only valid combinations of supported modes are M, M+U, M+S+U.
@@ -898,13 +904,21 @@ function legalize_satp(
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written_value : xlenbits,
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) -> xlenbits = {
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if xlen == 32 then {
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/* all 32-bit satp modes are valid */
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written_value
907+
let s = Mk_Satp32(written_value);
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match satpMode_of_bits(arch, 0b000 @ s[Mode]) {
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None() => prev_value,
910+
Some(_) => if extensionEnabled(Ext_Sv32) then s.bits else prev_value
911+
}
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} else if xlen == 64 then {
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let s = Mk_Satp64(written_value);
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match satpMode_of_bits(arch, s[Mode]) {
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None() => prev_value,
907-
Some(_) => s.bits
916+
Some(Sv_mode) => match Sv_mode {
917+
Sv39 => if extensionEnabled(Ext_Sv39) then s.bits else prev_value,
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Sv48 => if extensionEnabled(Ext_Sv48) then s.bits else prev_value,
919+
Sv57 => if extensionEnabled(Ext_Sv57) then s.bits else prev_value,
920+
_ => prev_value
921+
}
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}
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} else {
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internal_error(__FILE__, __LINE__, "Unsupported xlen" ^ dec_str(xlen))

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