SIMD-0272: SBPF Encoding Efficiency #272
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ripatel-fd
reviewed
Apr 1, 2025
| #### Two Source Register Operands | ||
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| For the 32 and 64 bit immediate-less variants of the following instructions: | ||
| add, sub, xor, or, and, lsh, rsh, arsh, udiv, urem, sdiv, srem, lmul, uhmul, shmul |
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I suggest arbitrarily renaming some of the mnemonics while we have the chance.
Suggested change
| add, sub, xor, or, and, lsh, rsh, arsh, udiv, urem, sdiv, srem, lmul, uhmul, shmul | |
| add, sub, xor, or, and, sll, srl, sra, divu, remu, mul, mulhu, mulhsu |
Changing mnemonics would also discourage developers from writing dangerously fast programs in assembler.
ripatel-fd
reviewed
Apr 1, 2025
| | `r6` to `r17` | GPR | Callee-saved | ||
| | `r18` to `r30` | GPR | Caller-saved | ||
| | `r31` | Frame pointer | System register | ||
| | `pc` | Program counter | Hidden register |
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We may want to burn one register and have it point to a "small data section" (.sdata) to improve the encoding efficiency of 64-bit loads.
LucasSte
reviewed
Apr 1, 2025
| | name | kind | Solana ABI | ||
| |---------------:|:----------------|:---------- | ||
| | `r0` | GPR | Return value | ||
| | `r1` to `r5` | GPR | Argument registers |
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I've seen many function calls use more than five registers to store arguments, so allocating more registers here (six or seven) would be beneficial to avoid stack spills.
kudzie3107
approved these changes
Apr 2, 2025
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