Move component log sizes from proof claim to Statement

[ilyalesokhin-starkware]

The Statement trait now exposes get_component_log_sizes; verify reads log sizes from the statement instead of proof.claim. The Claim struct is removed (claimed_sums is now a top-level field on Proof), shrinking the serialized proof by one packed-u8 entry per component.

CircuitStatement derives the per-component log sizes from n_blake_compress (added to CircuitParams/CircuitConfig) plus preprocessed column log sizes, and now takes &CircuitConfig instead of seven individual fields. Cairo's component log sizes ride along on public_claim, removing the dedicated field on CairoVerifierConfig.

[cursor]

PR Summary

Medium Risk
Touches proof wire format and verifier channel mixing inputs, so any mismatch between prover/statement-derived component sizing and serialized proofs could cause verification failures across integrations.

Overview
Per-component log sizes are no longer carried inside the STARK Proof. The Claim struct is removed, Proof now stores only claimed_sums, and serialization/deserialization + ProofInfo sizing are updated accordingly (shrinking proof bytes).

Verifier channel mixing now sources component log sizes from the Statement. The Statement trait gains get_component_log_sizes(), and verify mixes these sizes (and validates them) instead of reading them from the proof.

Circuit/Cairo statements/configs are updated to provide those log sizes. CircuitConfig/CircuitParams add n_blake_compress; CircuitStatement::new now takes a &CircuitConfig and derives blake-related component log sizes via a new component_log_sizes() helper. Cairo verification appends component_log_sizes to the public_claim and parses/stores them in CairoStatement for get_component_log_sizes().

Tests/examples are adjusted for the new APIs and updated expected proof size totals.

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[reviewable-StarkWare]

This change is 

[ilyalesokhin-starkware]

Will revisit after moving to blake in gates.

[ilyalesokhin-starkware]

• Remove log_sizes field from CircuitClaim #477
• Move component log sizes from proof claim to Statement #476 👈 (View in Graphite)
• main

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[cursor]

Cursor Bugbot has reviewed your changes and found 1 potential issue.

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[cursor]

Hardcoded log size constants risk diverging from source

Medium Severity

The component_log_size module hardcodes literal values for seven constants (BLAKE_ROUND_SIGMA, VERIFY_BITWISE_XOR_8, VERIFY_BITWISE_XOR_4, VERIFY_BITWISE_XOR_7, VERIFY_BITWISE_XOR_9, RANGE_CHECK_15, RANGE_CHECK_16) while VERIFY_BITWISE_XOR_12 correctly references super::verify_bitwise_xor_12::LOG_SIZE. Since all these component modules are already imported, the other constants could similarly reference their canonical LOG_SIZE source. If a component's LOG_SIZE changes in the future, the hardcoded verifier values would silently become stale, causing valid proofs to be rejected (a Fiat-Shamir transcript mismatch).

 

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