Modified and reimplemented FastLanes library in C - #9941
Conversation
|
@melihmutlu, @pnthao: please review this pull request.
|
Codecov Report❌ Patch coverage is 📢 Thoughts on this report? Let us know! |
b4fdfb1 to
1498677
Compare
|
should this be on tsl side, where all the other compression stuff lives? |
I'm hesitating on this. It logically belongs to the compression, but:
|
|
I am not going to fix the rest of codecov gaps, because they are either not reasonable or simply wrong |
I think it makes sense to add Assert(false) to the unreachable default cases/returns. For partial coverage of test assert functions, probably need to add them to the exception list like I did for assertions #9195 |
Thanks for the pointer, I now added the TestAssert.. stuff too, plus the Assert(false) guards. |
282bb2d to
8de352f
Compare
akuzm
left a comment
There was a problem hiding this comment.
Haven't read the algorithm code in detail, but I think we can proceed with merging it.
There is a background and intro document in src/fl/README.md The short version is: this change brings a C implementation of the FastLanes library to Timescale DB. The original idea is from 'The FastLanes Compression Layout: Decoding >100 Billion Integers per Second with Scalar Code' by Azim Afroozeh and Peter Boncz (https://doi.org/10.14778/3598581.3598587) Our version departs from the original ideas in a few ways: - instead of having a single 1024 bit virtual register, I introduce multiple smaller register widths, that I call 'tiered FL', the widths are 8, 16, 32, 64, 128 and 256 - we do not have 1024 bit virtual registers - our implementation relies on C macros, instead of C++ templates and code generation The src/fl/README.md file provides more details about the library. Co-authored-by: Sven Klemm <31455525+svenklemm@users.noreply.github.com> Signed-off-by: David Beck <david.beck.priv@gmail.com>
There is a background and intro document in tsl/src/compression/algorithms/fastlanes/README.md
The short version is: this change brings a C implementation of the FastLanes library to Timescale DB. The original idea is from 'The FastLanes Compression Layout: Decoding >100 Billion Integers per Second with Scalar Code' by Azim Afroozeh and Peter Boncz (https://doi.org/10.14778/3598581.3598587)
Our version departs from the original ideas in a few ways:
instead of having a single 1024 bit virtual register, I introduce multiple smaller register widths, that I call 'tiered FL', the widths are 8, 16, 32, 64, 128 and 256
we do not have 1024 bit virtual registers
our implementation relies on C macros, instead of C++ templates and code generation
The README.md file provides more details about the library.
The changelog file is disabled, as this change doesn't provide any useful functionality to the user on its own.
This change provides the basis for later compression algorithms to be introduced.
Disable-check: force-changelog-file
Co-authored-by: Sven Klemm 31455525+svenklemm@users.noreply.github.com
Signed-off-by: David Beck david.beck.priv@gmail.com