Support sram depth/width lists, as well as explicit list of legal combos

[richardyrh]

This is to support the TSTECH16C SRAM generators. The depth/widths supported is not a linear sequence; also, some combinations of valid depth and valid width is not valid (thus the triple option). This change should not have any impact on existing SRAM generators, since it looks for the JSON keys depth list, width list, or triples.

triples will take precedence, followed by the explicit lists, and then finally the fallback is the current scheme of specifying 3 numbers (start, end, step). If nothing is found, the compilation fails (like it currently does).

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Type of change:

• Bug fix
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Impact:

• RTL change
• Software change (RISC-V software)
• Build system change
• Other

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[Copilot]

Pull Request Overview

This PR adds support for more flexible SRAM depth and width specifications in SRAM generators, specifically targeting TSTECH16C SRAM generators that don't support linear sequences or all combinations of valid depth/width pairs.

• Extends SRAMGroup to support explicit lists of depths/widths and valid triples (depth, width, port) combinations
• Adds new JSON parsing logic to handle "depth list", "width list", and "triples" fields with fallback to existing range-based specifications
• Updates macro compilation logic to use triples when available for generating SRAM macros

Reviewed Changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated 4 comments.

File	Description
tools/tapeout/src/main/scala/macros/MacroCompiler.scala	Added logic to handle triples for macro generation with fallback to existing depth/width iteration
tools/tapeout/src/main/scala/macrolib/SRAM.scala	Extended SRAMGroup case class and JSON parsing to support explicit lists and triples alongside existing range specifications

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[iansseijelly]

LGTM. Might be worthy of documenting this new API somehow.