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Support sram depth/width lists, as well as explicit list of legal combos #2303

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Merged
richardyrh merged 1 commit into from
Oct 4, 2025
+50 −15
Merged

Support sram depth/width lists, as well as explicit list of legal combos #2303

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51 changes: 40 additions & 11 deletions tools/tapeout/src/main/scala/macrolib/SRAM.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -105,8 +105,9 @@ case class SRAMGroup(
family: String,
vt: Seq[String],
mux: Int,
depth: Range,
width: Range,
depth: Iterable[Int],
width: Iterable[Int],
triples: Option[Seq[(Int, Int, Int)]],
ports: Seq[MacroPort],
extraPorts: Seq[MacroExtraPort] = List()) {
def toJSON: JsObject = {
Expand All @@ -116,8 +117,18 @@ case class SRAMGroup(
"name" -> JsArray(name.map(Json.toJson(_))),
"vt" -> JsArray(vt.map(Json.toJson(_))),
"mux" -> Json.toJson(mux),
"depth" -> JsArray(Seq(depth.start, depth.end, depth.step).map { x => Json.toJson(x) }),
"width" -> JsArray(Seq(width.start, width.end, width.step).map { x => Json.toJson(x) }),
"depth" -> (depth match {
case list: List[Int] =>
JsArray(list.map { x => Json.toJson(x) })
case range: Range =>
JsArray(Seq(range.start, range.end, range.step).map { x => Json.toJson(x) })
}),
"width" -> (width match {
case list: List[Int] =>
JsArray(list.map { x => Json.toJson(x) })
case range: Range =>
JsArray(Seq(range.start, range.end, range.step).map { x => Json.toJson(x) })
}),
"ports" -> JsArray(ports.map { _.toJSON })
)
)
Expand Down Expand Up @@ -148,17 +159,35 @@ object SRAMGroup {
case Some(x: JsNumber) => x.value.intValue
case _ => return None
}
val depth: Range = json.get("depth") match {
val triples: Option[Seq[(Int, Int, Int)]] = json.get("triples") match {
case Some(x: JsArray) =>
val seq = x.as[List[JsArray]].map(_.as[List[JsNumber]].map(_.value.intValue))
Some(seq.map(y => (y(0), y(1), y(2))).sorted)
case _ => None
}
val depth: Iterable[Int] = json.get("depth list") match {
case Some(x: JsArray) =>
val seq = x.as[List[JsNumber]].map(_.value.intValue)
Range.inclusive(seq(0), seq(1), seq(2))
case _ => return None
seq.sorted
case _ => json.get("depth") match {
case Some(x: JsArray) =>
val seq = x.as[List[JsNumber]].map(_.value.intValue)
Range.inclusive(seq(0), seq(1), seq(2))
case _ =>
if (triples.isDefined) Seq() else return None
}
}
val width: Range = json.get("width") match {
val width: Iterable[Int] = json.get("width list") match {
case Some(x: JsArray) =>
val seq = x.as[List[JsNumber]].map(_.value.intValue)
Range.inclusive(seq(0), seq(1), seq(2))
case _ => return None
seq.sorted
case _ => json.get("width") match {
case Some(x: JsArray) =>
val seq = x.as[List[JsNumber]].map(_.value.intValue)
Range.inclusive(seq(0), seq(1), seq(2))
case _ =>
if (triples.isDefined) Seq() else return None
}
}
val ports: Seq[MacroPort] = json.get("ports") match {
case Some(x: JsArray) =>
Expand Down Expand Up @@ -188,7 +217,7 @@ object SRAMGroup {
}
case _ => List()
}
Some(SRAMGroup(name, family, vt, mux, depth, width, ports, extraPorts))
Some(SRAMGroup(name, family, vt, mux, depth, width, triples, ports, extraPorts))
}
}

Expand Down
14 changes: 10 additions & 4 deletions tools/tapeout/src/main/scala/macros/MacroCompiler.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -623,10 +623,16 @@ class MacroCompilerPass(
groups
.filter(g => g.family == sram.family && groupMatchesMask(g, sram))
.map(g => {
for {
w <- g.width
d <- g.depth if (sram.width % w == 0) && (sram.depth % d == 0)
} yield Seq(new Macro(buildSRAMMacro(g, d, w, g.vt.head)))
g.triples match {
case Some(triples) =>
for {(d, w, _) <- triples}
yield Seq(new Macro(buildSRAMMacro(g, d, w, g.vt.head)))
case None =>
for {
w <- g.width
d <- g.depth if (sram.width % w == 0) && (sram.depth % d == 0)
} yield Seq(new Macro(buildSRAMMacro(g, d, w, g.vt.head)))
}
})
case None => Seq()
}
Expand Down
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