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Update OpenFPGA #3056

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Update OpenFPGA branch with recent changes.

AlexandreSinger and others added 30 commits May 16, 2024 15:48
Raised the minimum Bison version to 3.3 since deprecation warnings were
showing up in libblifparse and libsdcparse which could not be resolved
unless the Bison version was 3.3.
Upstreamed the fine-grained parallel router implementation into the VTR
master. The original branch is https://github.com/verilog-to-routing/vtr-verilog-to-routing/tree/mq-parallel-router.

Modified the MultiQueue (SPAA'24) implementation and integrated it into
the VTR codebase.
The original FG parallel router used to use boost. VTR does not install
boost by default. Moved to STL instead.
Added a partial abstract class for ConnectionRouter, derived from the
pure abstract ConnectionRouterInterface.

The SerialConnectionRouter and ParallelConnectionRouter classes are now
derived from the ConnectionRouter class, utilizing the common class
members and helper functions to reduce code duplication.
Added Doxygen-style code comments and documentation for connection
routers, including the ConnectionRouter abstract class, the Parallel-
ConnectionRouter concrete class, and the SerialConnectionRouter concrete
class.

Updated the helper messages for command-line options added for parallel
connection router.
Fixed the interface issues of ConnectionRouter in NestedNetlistRouter.

Fixed code formats.

Fixed typo in read_options.cpp.
Updated the command-line usage for parallel connection router in both
Read the Docs and read_options.cpp.
Added regression tests for parallel connection router by appending extra
sets of configurations to those VTR flow regression tests previously
selected by Fahri for testing coarse-grained parallel router.

Removed VPR connection router test (vpr/test/test_connection_router.cpp),
since it has been out-dated for a very long time and has caused lots of
trouble for running VPR C++ tests locally.
Fixed a weird code formatting issue in libs/librtlnumber/src/include/
internal_bits.hpp. GitHub CI said the file failed dev/check-format.sh,
however, the same script runs perfectly in my local environment. Double
checked the version of clang-format, which seemed to be the same as CI.

Directly copied the file from the GitHub repo to resolve this issue.
The `No source in route tree` bug in ParallelConnectionRouter (since
commit 875b98e) has been fixed. It turns out that putting another member
variable `MultiQueueDAryHeap<HeapImplementation::arg_D> heap_` in the
derived class ParallelConnectionRouter together with the existing
`HeapImplementation heap_` in the base class ConnectionRouter causes the
issue. The solution is to keep `heap_` only in the base class and use
`ConnectionRouter<MultiQueueDAryHeap<HeapImplementation::arg_D>>` rather
than `ConnectionRouter<HeapImplementation>` for deriving the parallel
connection router.

Please note that ParallelConnectionRouter still has some bugs (i.e.,
getting stuck in the MultiQueue pop). This commit is not fully working.
Please do not use it for any experiments.

Updated the previously incorrect command-line options for the parallel
connection router in the regression tests.
Found that the mass legalizer was not spreading out the blocks well
enough according to the mass.

Revistied the spatial partitioning in the mass legalizer. Before, we
just cut the window in half in the larger dimension. This was fine,
however it may create an inbalanced cut which can cause things to not
spread well. Instead, we now search for the best partition by trying
different partition lines and computing how balanced the partition is.
Although this is more expensive than before, by creating more balanced
partitions, it should allow the mass legalizer to converge faster. Time
in the mass legalizer is also dominated by partitioning the blocks, so
increasing the time to choose the partition line should not have that
large of an effect anyways.

Found an oversight with how blocks were partitioned when one of the
partitions become overfilled. Fixed this issue.
@github-actions github-actions bot added VPR VPR FPGA Placement & Routing Tool Odin Odin II Logic Synthesis Tool: Unsorted item libarchfpga Library for handling FPGA Architecture descriptions docs Documentation lang-cpp C/C++ code infra Project Infrastructure scripts Utility & Infrastructure scripts lang-make CMake/Make code lang-hdl Hardware Description Language (Verilog/VHDL) lang-shell Shell scripts (bash etc.) libvtrutil external_libs lang-netlist Parmys labels May 19, 2025
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docs Documentation external_libs infra Project Infrastructure lang-cpp C/C++ code lang-hdl Hardware Description Language (Verilog/VHDL) lang-make CMake/Make code lang-netlist lang-shell Shell scripts (bash etc.) libarchfpga Library for handling FPGA Architecture descriptions libvtrutil Odin Odin II Logic Synthesis Tool: Unsorted item Parmys scripts Utility & Infrastructure scripts VPR VPR FPGA Placement & Routing Tool
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