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Add TRAP Instructions, Signed Support, PennSim Testing #7
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The main feature of this commit is full support up to TRAP instructions. This should achieve support + confirmed tested functionality against PennSim for LC3 with no I/O functionality.
Achieved along the way:
Negative offset arguments are constructed by two bitshifts, in order to properly pad the top. We may want to represent the negative operations differently (or do direct wrapping adds instead of using an if for negatives) to improve efficiency.
None of the harnesses currently support I/O -- just two different approaches to no I/O being connected.
Instructions and CoreLC3 are not fully tested for compatibility against PennSim -- only the subset used in the example UNCA programs is currently verified.