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Size History Size History #13022: Merge group checks requested
5m 23s
5m 23s
Build and Test Build and Test #15002: Merge group checks requested
48m 39s
48m 39s
Policy Policy #10084: Merge group checks requested
3m 46s
3m 46s
Subsystem FPGA Build Subsystem FPGA Build #3989: Merge group checks requested
1h 1m 0s
1h 1m 0s
FPGA Build FPGA Build #9155: Merge group checks requested
36m 46s
36m 46s
Fuzz Testing Nightly Fuzz Testing Nightly #857: Scheduled
2m 7s main
main
2m 7s
Nightly Release Nightly Release #156: Scheduled
3h 23m 16s main
main
3h 23m 16s
Nightly Release 2.x Nightly Release 2.x #964: Scheduled
4h 29m 23s main
main
4h 29m 23s
Verilator Nightly Verilator Nightly #518: Scheduled
1m 11s main
main
1m 11s
Address test_generate_csr_envelop_stress timeouts Size History #13021: Pull request #3880 opened by nquarton
5m 35s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
5m 35s
Address test_generate_csr_envelop_stress timeouts Subsystem FPGA Build #3988: Pull request #3880 opened by nquarton
1h 44m 20s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
1h 44m 20s
Address test_generate_csr_envelop_stress timeouts FPGA Build #9154: Pull request #3880 opened by nquarton
37m 47s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
37m 47s
Address test_generate_csr_envelop_stress timeouts Policy #10083: Pull request #3880 opened by nquarton
3m 40s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
3m 40s
Address test_generate_csr_envelop_stress timeouts Build and Test #15001: Pull request #3880 opened by nquarton
52m 13s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
52m 13s
Address test_generate_csr_envelop_stress timeouts Code Coverage #2737: Pull request #3880 opened by nquarton
39m 56s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
39m 56s
Address test_generate_csr_envelop_stress timeouts Verilator Hardware Model #14895: Pull request #3880 opened by nquarton
1h 18m 40s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
1h 18m 40s
Port DPE dependency bump to caliptra-2.0 Size History #13020: Pull request #3830 synchronize by parvathib
3m 13s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
3m 13s
Port DPE dependency bump to caliptra-2.0 FPGA Build #9153: Pull request #3830 synchronize by parvathib
45m 58s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
45m 58s
Port DPE dependency bump to caliptra-2.0 Verilator Hardware Model #14894: Pull request #3830 synchronize by parvathib
1h 11m 34s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
1h 11m 34s
Port DPE dependency bump to caliptra-2.0 Policy #10082: Pull request #3830 synchronize by parvathib
3m 50s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
3m 50s
Port DPE dependency bump to caliptra-2.0 Build and Test #15000: Pull request #3830 synchronize by parvathib
23m 13s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
23m 13s
Port DPE dependency bump to caliptra-2.0 Code Coverage #2736: Pull request #3830 synchronize by parvathib
17m 41s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
17m 41s
Port DPE dependency bump to caliptra-2.0 Subsystem FPGA Build #3987: Pull request #3830 synchronize by parvathib
2h 25m 58s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
2h 25m 58s
Port DPE dependency bump to caliptra-2.0 .github/workflows/versioned-full-build-test.yml #6776: Pull request #3830 by parvathib
Failure parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
Failure
[xtask]: Add flow with retries for downloading GitHub artifacts Publish merged PRs on Slack #1896: Pull request #3725 closed by clundin25
1s
1s
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