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    • An RTL-to-Chip Silicon Design Solution.
      TypeScript
      Apache License 2.0
      94835Updated Jul 25, 2026Jul 25, 2026
    • ECC-branded DREAMPlace Placement Engine.
      C++
      Apache License 2.0
      2101Updated Jul 24, 2026Jul 24, 2026
    • ecc

      Public
      A Chip Design Automation Solution with Open Source EDA Tools.
      Python
      Apache License 2.0
      61514Updated Jul 24, 2026Jul 24, 2026
    • ecc-tools

      Public
      An Open Source EDA Infracstructure and Tools from Netlist to GDS for ASIC Design.
      C++
      Other
      41102Updated Jul 24, 2026Jul 24, 2026
    • mpc-soc

      Public
      SystemVerilog
      Apache License 2.0
      0000Updated Jul 22, 2026Jul 22, 2026
    • Embedded Development Framework for ECOS SoC Chip.
      C
      Apache License 2.0
      101702Updated Jul 20, 2026Jul 20, 2026
    • ecc-fe

      Public
      A chip front-end design solution with open source tools.
      Python
      Apache License 2.0
      0000Updated Jul 17, 2026Jul 17, 2026
    • ecc-sizer

      Public
      C++
      Apache License 2.0
      1000Updated Jul 12, 2026Jul 12, 2026
    • ICsprout55 PDK Documentation.
      Apache License 2.0
      1800Updated Jul 8, 2026Jul 8, 2026
    • 55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd. (ICS55 for short).
      Verilog
      Apache License 2.0
      25245100Updated Jul 8, 2026Jul 8, 2026
    • .github

      Public
      The Information of Organization.
      Apache License 2.0
      0100Updated Jul 8, 2026Jul 8, 2026
    • Embedded Documentation.
      Apache License 2.0
      3601Updated Jul 3, 2026Jul 3, 2026
    • Website Template of MkDocs.
      Python
      Apache License 2.0
      0100Updated Jul 1, 2026Jul 1, 2026
    • ECOS Studio compatible Surfer web assets for offline waveform viewing through the Resource Manager.
      European Union Public License 1.2
      0000Updated Jul 1, 2026Jul 1, 2026
    • Website Resources of Documentation.
      Apache License 2.0
      0200Updated Jul 1, 2026Jul 1, 2026
    • mpc-frame

      Public
      Verilog
      0000Updated Jun 16, 2026Jun 16, 2026
    • HTML
      0000Updated Jun 15, 2026Jun 15, 2026
    • Verilog
      0100Updated Jun 15, 2026Jun 15, 2026
    • Metadata repository for the RISCV32IMAC processor core development item.
      Python
      0100Updated Jun 15, 2026Jun 15, 2026
    • Metadata repository for the basic SoC interconnect bus development item.
      Python
      0000Updated Jun 15, 2026Jun 15, 2026
    • Metadata repository for the DDR3 memory controller development item.
      Python
      0000Updated Jun 15, 2026Jun 15, 2026
    • Metadata repository for the 55nm DDR3/DDR2 PHY IP development item.
      Python
      0000Updated Jun 15, 2026Jun 15, 2026
    • Metadata repository for the 55nm PLL IP development item.
      Python
      0000Updated Jun 15, 2026Jun 15, 2026
    • APB4 CLINT controller IP packaged from 20250627 tapeout snapshot
      SystemVerilog
      Mulan Permissive Software License, Version 2
      0000Updated Jun 11, 2026Jun 11, 2026
    • APB4 reset and clock unit IP packaged from 20250627 tapeout snapshot
      SystemVerilog
      Mulan Permissive Software License, Version 2
      0000Updated Jun 11, 2026Jun 11, 2026
    • APB4 RTC controller IP packaged from 20250627 tapeout snapshot
      SystemVerilog
      Mulan Permissive Software License, Version 2
      0000Updated Jun 11, 2026Jun 11, 2026
    • APB4 CRC controller IP packaged from 20250627 tapeout snapshot
      SystemVerilog
      Mulan Permissive Software License, Version 2
      0000Updated Jun 11, 2026Jun 11, 2026
    • APB4 PLIC controller IP packaged from 20250627 tapeout snapshot
      SystemVerilog
      Mulan Permissive Software License, Version 2
      0000Updated Jun 11, 2026Jun 11, 2026
    • SystemVerilog
      0000Updated Jun 10, 2026Jun 10, 2026
    • sys-uart

      Public
      Verilog
      GNU Lesser General Public License v2.1
      0000Updated Jun 10, 2026Jun 10, 2026
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