[FPSAN] Load TCGen shared operands directly#10473
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Centralize ordinary dot K verification in DotOpInterface, share MMAv2 warp distribution between matmul acceleration and FPSan, and simplify FPSan tile selection using TTGIR's power-of-two shape invariant. Preserve bounded emulation tiles and existing i8 decomposition eligibility.
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ThomasRaoux
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Jun 5, 2026
| let assemblyFormat = "attr-dict `:` type($result)"; | ||
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| def TTI_ExperimentalLocalGatherOp |
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why can't just slice and local_load?
peterbell10
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Jun 5, 2026
…local-gather-scatter-multicta
Keep partitioned shared gather and scatter unsupported until their multiple-base addressing is implemented. Pass target CTA IDs through the shared-memory target API and let NVIDIA select local versus cluster accesses. Add forced cross-CTA gather and scatter correctness coverage by swapping the CGA-distributed column bit. Validate with the compiler build, conversion lit tests, focused Gluon gather/scatter tests, and pre-commit.
…b.com/triton-lang/triton into jeffniu/local-gather-scatter-multicta
…-experimental-local-gather # Conflicts: # include/triton/Conversion/TritonGPUToLLVM/Utility.h # lib/Conversion/TritonGPUToLLVM/MemoryOpToLLVM.cpp # lib/Conversion/TritonGPUToLLVM/Utility.cpp
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Slice is too restricted to perform the partial subviews needed to load the tiny subtiles of the MMA. |
This was referenced Jun 7, 2026
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#10526 would enable not adding an extra op |
This was referenced Jun 8, 2026
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Discussed this offline with @lezcano @ThomasRaoux and @peterbell10
I'll move forward with the |
This was referenced Jun 10, 2026
pawelszczerbuk
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Jun 11, 2026
jeffniu-openai
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Jun 11, 2026
Context: #10473 landed after #10572 removed the old sliced-layout helpers, so the restacked #10527 called getSingleDimSliceEncoding and expandAllSlicedDims and failed during compilation on every CI GPU job. Implementation: derive the K-axis range type with getSlicedTensorType and expand it with reshapeAndBroadcast, matching the replacement API introduced by #10572 while preserving the direct result layout. Validation: - ninja -C build/cmake.macosx-11.0-arm64-cpython-3.12 triton-opt -j8 - lit -v test/TritonGPU/nvidia-fpsan.mlir test/TritonGPU/fpsan.mlir
jeffniu-openai
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Jun 12, 2026
PR description written by Codex Load shared MMA operands directly into their result layouts and reuse existing scale shadows, avoiding redundant layout conversions and scale snapshots, and also load accumulator directly into its MMA layout. ## Stack Merge bottom-up: - [x] #10472 - [x] #10473 - [ ] #10527 (this PR) - [ ] #10532 - [ ] #10533 - [ ] #10542 - [ ] #10548 - [ ] #10561 - [ ] #10559
jeffniu-openai
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Jun 12, 2026
PR description written by Codex Optimize i8 decomposition by reordering the dots and eagerly combining into the accumulator-on-the-fly to minimize register pressure, and include a basic subtiling heuristic determined experimentally ## Stack Merge bottom-up: - [x] #10472 - [x] #10473 - [x] #10527 - [x] #10532 - [ ] #10533 (this PR) - [ ] #10542 - [ ] #10548 - [ ] #10561 - [ ] #10559
jeffniu-openai
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Jun 12, 2026
PR description written by Codex Fix FPSAN TMEM emulation for initialized scratch synchronization, predicated stores, reduction loads, and scale-copy reinterpret views. ## Stack Merge bottom-up: - [x] #10472 - [x] #10473 - [x] #10527 - [x] #10532 - [x] #10533 - [ ] #10542 (this PR) - [ ] #10548 - [ ] #10561 - [ ] #10559
jeffniu-openai
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Jun 12, 2026
PR description written by Codex Remove redundant payload sign clears before masked multiplies so NVPTX cannot fold them to `abs.f32`, which quiets signaling NaNs. Add a reduced one-warp regression that fails bitwise on PR #10542’s base and passes with the fix. ## Stack Merge bottom-up: - [x] #10472 - [x] #10473 - [x] #10527 - [x] #10532 - [x] #10533 - [x] #10542 - [ ] #10548 (this PR) - [ ] #10561 - [ ] #10559
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PR description written by Codex
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