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Pull requests: chipsalliance/Cores-VeeR-EL2
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[RTL] Register file output ports DCLS comparison
#482
opened Jun 30, 2026 by
nasahlpa
Collaborator
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create nightly regression (placeholder file)
#480
opened Jun 29, 2026 by
sileno-rocco-soc
Collaborator
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Added new tests for mubi and few other directed tests (ecc threshold, internal state)
#479
opened Jun 26, 2026 by
samipmodi323
Collaborator
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Draft
CI: rework CI flow to not start all the custom jobs at once
#476
opened Jun 26, 2026 by
kgugala
Member
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[RTL] Synthesis optimization barriers for DCLS
#472
opened Jun 24, 2026 by
nasahlpa
Collaborator
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Adding Makefile common.mk and Python script to generate run_local_regression.sh
#469
opened Jun 24, 2026 by
jinalhpatel
Collaborator
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Resubmitted DCLS val updates, updates to regress scripts and Makefile
#468
opened Jun 23, 2026 by
samipmodi323
Collaborator
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DCLS val updates, updates to regress scripts and Makefile
#459
opened Jun 12, 2026 by
samipmodi323
Collaborator
•
Draft
Fix prefix_macros.sh to handle .svh headers, pic_map_auto.h, and RV_BUILD_AHB_LITE macro
#449
opened Apr 14, 2026 by
MainakSil
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Improve PMP verification on instruction fetch
#436
opened Dec 11, 2025 by
mszalkowski-ant
Collaborator
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axi4_to_ahb: do not align ahb_haddr on stream read
#419
opened Sep 16, 2025 by
kgugala
Member
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